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FEATURES
Laser Trimmed to High Accuracy:
10.000 V 5 mV (L and U Grades)
Trimmed Temperature Coefficient:
5 ppm/ C max, (L and U Grades)
Noise Reduction Capability
Low Quiescent Current: 4 mA max
Output Trim Capability
MIL-STD-883 Compliant Versions Available
+V
IN
2
R
S
NOISE
REDUCTION
8
High Precision
10 V Reference
AD587
FUNCTIONAL BLOCK DIAGRAM
A1
R
F
R
T
6 V
OUT
5 TRIM
R
I
AD587
4
GND
NOTE:
PINS 1,3, AND 7 ARE INTERNAL TEST POINTS.
NO CONNECTIONS TO THESE POINTS.
PRODUCT DESCRIPTION
PRODUCT HIGHLIGHTS
The AD587 represents a major advance in the state-of-the-art in
monolithic voltage references. Using a proprietary ion-implanted
buried Zener diode and laser wafer trimming of high stability
thin-film resistors, the AD587 provides outstanding perfor-
mance at low cost.
The AD587 offers much higher performance than most other
10 V references. Because the AD587 uses an industry standard
pinout, many systems can be upgraded instantly with the
AD587. The buried Zener approach to reference design pro-
vides lower noise and drift than bandgap voltage references. The
AD587 offers a noise reduction pin which can be used to further
reduce the noise level generated by the buried Zener.
The AD587 is recommended for use as a reference for 8-, 10-,
12-, 14- or 16-bit D/A converters which require an external
precision reference. The device is also ideal for successive
approximation or integrating A/D converters with up to 14 bits
of accuracy and, in general, can offer better performance than
the standard on-chip references.
The AD587J, K and L are specified for operation from 0°C to
+70°C, and the AD587S, T and U are specified for –55°C to
+125°C operation. All grades are available in 8-pin cerdip. The
J and K versions are also available in an 8-pin Small Outline IC
(SOIC) package for surface mount applications, while the J, K,
and L grades also come in an 8-pin plastic package.
1. Laser trimming of both initial accuracy and temperature
coefficients results in very low errors over temperature with-
out the use of external components. The AD587L has a
maximum deviation from 10.000 V of
±
8.5 mV between 0°C
and +70°C, and the AD587U guarantees
±
14 mV maximum
total error between –55°C and +125°C.
2. For applications requiring higher precision, an optional fine
trim connection is provided.
3. Any system using an industry standard pinout 10 volt refer-
ence can be upgraded instantly with the AD587.
4. Output noise of the AD587 is very low, typically 4
µV
p-p. A
noise reduction pin is provided for additional noise filtering
using an external capacitor.
5. The AD587 is available in versions compliant with MIL-
STD-883. Refer to the Analog Devices Military Products
Databook or current AD587/883B data sheet for detailed
specifications.
REV. D
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2000
AD587–SPECIFICATIONS
(T = +25 C, V
A
IN
= +15 V unless otherwise noted)
Min
9.995
AD587K/T
Typ
Max
10.005
10
10
+3
–1
+3
–1
Min
9.995
AD587L/U
Typ
Max
10.005
5
5
Units
V
ppm/°C
%
Model
Min
OUTPUT VOLTAGE
OUTPUT VOLTAGE DRIFT
1
0°C to +70°C
–55°C to +125°C
GAIN ADJUSTMENT
LINE REGULATION
1
13.5 V
≤
+ V
IN
≤
36 V
T
MIN
to T
MAX
LOAD REGULATION
Sourcing 0 < I
OUT
< 10 mA
T
MIN
to T
MAX
Sourcing –10 < I
OUT
< 0 mA
2
T
MIN
to T
MAX
QUIESCENT CURRENT
POWER DISSIPATION
OUTPUT NOISE
0.1 Hz to 10 Hz
Spectral Density, 100 Hz
LONG-TERM STABILITY
SHORT-CIRCUIT CURRENT-TO-GROUND
SHORT-CIRCUIT CURRENT-TO-V
IN
TEMPERATURE RANGE
Specified Performance (J, K, L)
Operating Performance (J, K, L)
3
Specified Performance (S, T, U)
Operating Performance (S, T, U)
3
0
–40
–55
–55
1
AD587J/S
Typ
Max
10.010
20
20
9.990
+3
–1
100
100
100
±µV/V
100
100
2
30
4
100
15
30
30
70
70
+70
+85
+125
+125
0
–40
–55
–55
4
2
30
4
100
15
30
30
100
100
4
2
30
4
100
15
70
70
+70
+85
+125
+125
0
–40
–55
–55
30
30
100
100
4
±µV/mA
mA
mW
µV
p-p
nV/√Hz
±
ppm/1000 Hr.
70
70
+70
+85
+125
+125
mA
mA
°C
NOTES
1
Spec is guaranteed for all packages and grades. Cerdip packaged parts are 100% production test.
2
Load Regulation (Sinking) specification for SOIC (R) package is
±200 µV/mA.
3
The operating temperature ranged is defined as the temperatures extremes at which the device will still function. Parts may deviate from their specified performance
outside their specified temperature range.
Specifications subject to change without notice.
ORDERING GUIDE
Model
1
Initial
Error
10 mV
10 mV
10 mV
5 mV
5 mV
5 mV
5 mV
5 mV
10 mV
10 mV
5 mV
10 mV
Temperature
Coefficient
20 ppm/°C
20 ppm/°C
20 ppm/°C
10 ppm/°C
10 ppm/°C
10 ppm/°C
5 ppm/°C
5 ppm/°C
20 ppm/°C
10 ppm/°C
5 ppm/°C
20 ppm/°C
Temperature
Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
0°C to +70°C
Package
Options
2
Q-8
SO-8
N-8
Q-8
SO-8
N-8
Q-8
N-8
Q-8
Q-8
Q-8
AD587JQ
AD587JR
AD587JN
AD587KQ
AD587KR
AD587KN
AD587LQ
AD587LN
AD587SQ
AD587TQ
AD587UQ
AD587JCHIPS
NOTES
1
For details on grade and package offerings screened in accordance with MIL-STD-883, refer to the
Analog Devices Military Products Databook or current AD587/883B data sheet.
2
N = Plastic DIP; Q = Cerdip; SO = SOIC.
–2–
REV. D
AD587
ABSOLUTE MAXIMUM RATINGS*
PIN CONFIGURATION
NOISE
8 REDUCTION
V
IN
to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 V
Power Dissipation (+25°C) . . . . . . . . . . . . . . . . . . . . . 500 mW
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Lead Temperature (Soldering, 10 sec) . . . . . . . . . . . . +300°C
Package Thermal Resistance
θ
JC
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22°C/W
θ
JA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110°C/W
Output Protection: Output safe for indefinite short to ground and
momentary short to V
IN
.
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
TP
*
1
+V
IN
2
AD587
7 TP
*
TOP VIEW
TP
*
3 (Not to Scale) 6 V
OUT
5 TRIM
GND 4
*
TP DENOTES FACTORY TEST POINT.
NO CONNECTIONS SHOULD BE MADE
TO THESE PINS.
DIE SPECIFICATIONS
Parameter
Output Voltage
Gain Adjustment
Line Regulation
13.5 V < + V
IN
< 36 V
Load Regulation
Sourcing 0 < I
OUT
< 10 mA
Sinking –10 < I
OUT
< 0 mA
Quiescent Current
Short-Circuit Current-to-Ground
Short-Circuit Currrent-to-V
OUT
The following specifications are tested at the die level for AD587JCHIPS. These die are probed at +25°C only.
(T
A
= +25°C, V
IN
= +15 V unless otherwise noted)
DIE LAYOUT
Units
AD587JCHIPS
Min Typ Max
9.990
–1
10.010 V
3
100
100
100
2
4
70
70
%
±µV/V
µV/mA
µV/mA
mA
mA
mA
Die Size: 0.081
×
0.060 Inches
NOTES
1
Both V
OUT
pads should be connected to the output.
2
Sense and force grounds must be tied together.
Die Thickness:
The standard thickness of Analog Devices Bipolar dice is 24 mils
±
2 mils.
Die Dimensions:
The dimensions given have a tolerance of
±
2 mils.
Backing:
The standard backside surface is silicon (not plated). Analog Devices does not recommend
gold-backed dice for most applications.
Edges:
A diamond saw is used to separate wafers into dice thus providing perpendicular edges half-
way through the die.
In contrast to scribed dice, this technique provides a more uniform die shape and size . The perpen-
dicular edges facilitate handling (such as tweezer pick-up) while the uniform shape and size simplifies
substrate design and die attach.
Top Surface:
The standard top surface of the die is covered by a layer of glassivation . All areas are
covered except bonding pads and scribe lines.
Surface Metalization:
The metalization to Analog Devices bipolar dice is aluminum. Minimum
thickness is 10,000Å.
Bonding Pads:
All bonding pads have a minimum size of 4 mils by 4 mils. The passivation windows
have 3.5 mils by 3.5 mils minimum.
REV. D
–3–
AD587
THEORY OF OPERATION
NOISE PERFORMANCE AND REDUCTION
The AD587 consists of a proprietary buried Zener diode refer-
ence, an amplifier to buffer the output and several high stability
thin-film resistors as shown in the block diagram in Figure 1.
This design results in a high precision monolithic 10 V output
reference with initial offset of 5 mV or less. The temperature
compensation circuitry provides the device with a temperature
coefficient of under 5 ppm/°C.
+V
IN
2
R
S
A1
R
F
R
T
5 TRIM
R
I
6 V
OUT
NOISE
REDUCTION
8
The noise generated by the AD587 is typically less than 4
µV
p-p over the 0.1 Hz to 10 Hz band. Noise in a 1 MHz band-
width is approximately 200
µV
p-p. The dominant source of
this noise is the buried Zener which contributes approximately
100 nV/√Hz. In comparison, the op amp’s contribution is negli-
gible. Figure 3 shows the 0.1 Hz to 10 Hz noise of a typical
AD587. The noise measurement is made with a bandpass filter
made of a 1-pole high-pass filter with a corner frequency at
0.1 Hz and a 2-pole low-pass filter with a corner frequency at
12.6 Hz to create a filter with a 9.922 Hz bandwidth.
AD587
4
GND
NOTE:
PINS 1,3, AND 7 ARE INTERNAL TEST POINTS.
NO CONNECTIONS TO THESE POINTS.
Figure 1. AD587 Functional Block Diagram
A capacitor can be added at the NOISE REDUCTION pin (Pin
8) to form a low-pass filter with R
S
to reduce the noise contribu-
tion of the Zener to the circuit.
APPLYING THE AD587
Figure 3. 0.1 Hz to 10 Hz Noise
The AD587 is simple to use in virtually all precision reference
applications. When power is applied to Pin 2, and Pin 4 is
grounded, Pin 6 provides a 10 V output. No external compo-
nents are required; the degree of desired absolute accuracy is
achieved simply by selecting the required device grade. The
AD587 requires less than 4 mA quiescent current from an oper-
ating supply of +15 V.
Fine trimming may be desired to set the output level to exactly
10.000 V (calibrated to a main system reference). System cali-
bration may also require a reference voltage that is slightly differ-
ent from 10.000 V, for example, 10.24 V for binary applications.
In either case, the optional trim circuit shown in Figure 2 can
offset the output by as much as 300 mV, if desired, with mini-
mal effect on other device characteristics.
+V
IN
2
OPTIONAL
NOISE
REDUCTION
CAPACITOR
C
N
1µF
V
IN
8
NOISE
V
O
REDUCTION
6
OUTPUT
If further noise reduction is desired, an external capacitor may
be added between the NOISE REDUCTION pin and ground as
shown in Figure 2. This capacitor, combined with the 4 kΩ R
S
and the Zener resistances, form a low-pass filter on the output
of the Zener cell. A 1
µF
capacitor will have a 3 dB point at
40 Hz, and it will reduce the high frequency (to 1 MHz) noise
to about 160
µV
p-p. Figure 4 shows the 1 MHz noise of a typi-
cal AD587 both with and without a 1
µF
capacitor.
Figure 4. Effect of 1
µ
F Noise Reduction Capacitor on
Broadband Noise
TURN-ON TIME
AD587
TRIM
GND
4
5
10kΩ
Figure 2. Optional Fine Trim Configuration
Upon application of power (cold start), the time required for the
output voltage to reach its final value within a specified error
band is defined as the turn-on settling time. Two components
normally associated with this are: the time for the active circuits
to settle, and the time for the thermal gradients on the chip to
stabilize. Figure 5 shows the turn-on characteristics of the
AD587. It shows the settling to be about 60
µs
to 0.01%. Note
the absence of any thermal tails when the horizontal scale is ex-
panded to 1 ms/cm in Figure 5b.
–4–
REV. D
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