Chip enable input. This pin is high for normal operation and low for shutdown and V
PSW
load disconnect.
Shutdown input. This pin is low for normal operation and high for shutdown and V
PSW
load disconnect.
Power supply input voltage.
No connection.
No connection.
Regulated +5V output.
V
05
output connected through a series switch, PSW.
Output of doubled input voltage.
The positive terminal of doubling charge-pump capacitor, C1.
The negative terminal of doubling charge-pump capacitor, C1.
GND
**
GND
CE
**
GND
**
SD
V
IN*
NC
NC
V
05
V
PSW
V
DBL
C
1
+
C
1−
* All V
IN
pins, pin 1 and pin 7 must be tied together for proper operation.
** All ground pins, pin 2, pin 3 and pin 4 must be tied together for proper operation.
www.national.com
2
LM2686
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (V
IN
to GND)
SD, CE
V
05
Continuous Output Current
V
05
Short-Circuit Duration to GND
(Note 2)
Continuous Power Dissipation (T
A
=
25˚C) (Note 3)
6.8V
(GND − 0.3V) to
(V
In
+ 0.3V)
80mA
Indefinite
600mW
T
JMAX
(Note 3)
θ
JA
(Note 3)
Operating Ambient Temp. Range
Operating Junction Temperature
Range
Storage Temp. Range
Lead Temp. (Soldering, 10 sec.)
ESD Rating (Note 4)
150˚C
140˚C/W
−40˚C to 85˚C
−40˚C to 125˚C
−65˚C to 150˚C
300˚C
2kV
Electrical Characteristics
Limits with standard typeface apply for T
J
= 25˚C, and limits in
boldface type
apply over the full temperature range. Unless
otherwise specified V
IN
= 3.6V, C
1
= C
3
= 2.2µF. C
2
= 4.7µF. (Note 5)
Symbol
V
+
Parameter
Supply Voltage
Supply Current
Shutdown Supply Current
Shutdown Pin Input Voltage for
CE, SD
Output Current at V
05
Switch Frequency
Average Power Efficiency at V
05
Output Regulation
No Load
V
IN
= 6.5V
Conditions
Min
2.85
Typ
450
6
Max
6.5
950
30
0.8
50
Units
V
µA
µA
V
mA
kHz
%
I
Q
I
SD
V
SD
I
L
(+5V)
F
SW
P
EFF
V
05
Logic Input High
@
6.5V
Logic Input Low
@
6.5V
2.85V
<
V
IN
<
6.5V
2.4
85
2.85V
<
V
IN
<
6.5V
I
L
= 25mA to GND
1mA
<
I
L
<
50mA, V
IN
= 6.5V
(Note 6)
1mA
<
I
L
<
50mA, V
IN
= 6.5V
(Note 6)
4.848
4.797
130
82
5.05
5.05
0.25
0.05
0.3
5.0
180
5.252
5.303
V
V
G
LINE
G
LOAD
R
SW
Line Regulation
Load Regulation
2.85V
<
V
IN
<
3.6V
3.6V
<
V
IN
<
6.5V
1mA
<
I
L
<
50mA, V
IN
= 6.5V
%/V
1.0
%
Ω
Series Switch Resistance from V
05
V
IN
>
2.85V
to V
PSW
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but do not guarantee specific performance limits. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2:
V
05
may be shorted to GND without damage. For temperature above 85˚C, V
05
must not be shorted to GND or device may be damaged.
Note 3:
The maximum allowable power dissipation is calculated by using P
DMAX
= (T
JMAX
— T
A
)/θ
JA
, where T
JMAX
is the maximum junction temperature, T
A
is the
ambient temperature and
θ
JA
is the junction-to-ambient thermal resistance of the specified package.
Note 4:
The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin.
Note 5:
In the typical operating circuit, capacitors C
1
and C
3
are 2.2µF, 0.3Ω maximum ESR capacitors. Capacitors with higher ESR will increase output resistance,
reduce output voltage and efficiency.
Note 6:
The 50mA maximum current assumes no current is drawn from V
DBL
pin. See Voltage Doubler section in the Detailed Device Description.
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Embedded System
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