The 5075 series are miniature VCXO ICs that provide a wide frequency pulling range, even when using minia-
ture crystal units for which a wide pulling range is difficult to provide. They employ a recently developed vari-
cap diode fabrication process that provides a wide frequency pulling range and good linearity without any
external components. Also, they employ a regulated voltage drive oscillator circuit that significantly reduces
current consumption, crystal current, and oscillation characteristics supply voltage dependency. The 5075
series are ideal for miniature, wide pulling range, low power consumption, VCXO modules.
FEATURES
I
I
I
I
I
I
VCXO with recently developed varicap diode
built-in
New fabrication process that significantly reduces
parasitic capacitance and provides wide pulling
range even when using miniature crystal units
Regulated voltage drive oscillator circuit for
reduced power consumption, crystal drive current,
and oscillation characteristics voltage dependency
Wide frequency pulling range
•
±
190ppm (B1 version, f = 27MHz)
(Crystal:
γ
= 300, C0 = 1.5pF)
Operating supply voltage range: 2.25V to 3.63V
Oscillation frequency range (for fundamental oscil-
lation): 20MHz to 55MHz (varies with version)
I
I
I
I
I
I
Low current consumption: 1.0mA
(B1 version, f = 27MHz, no load, V
DD
= 3.3V)
Frequency divider built-in
• Selectable by version: f
O
, f
O
/2, f
O
/4, f
O
/8, f
O
/16
• Frequency divider output for 1.3MHz (min) low
frequency output
VC pin input resistance: 10MΩ (min)
CMOS output
Two types of pad layout selectable by mounting
method
• A
×
version: for Flip Chip Bonding
• B
×
version: for Wire Bonding
Package: Wafer form (WF5075××)
Chip form (CF5075××)
APPLICATIONS
I
2.5
×
2.0mm, 3.2
×
2.5mm size miniature VCXO modules for digital mobile TV tuner, digital TV (PDP,
LCD), PND (Personal Navigation Device), etc.
ORDERING INFORMATION
Device
WF5075××−4
CF5075××−4
Package
Wafer form
Chip form
SEIKO NPC CORPORATION —1
5075 series
SERIES CONFIGURATION
Operating
supply voltage
range [V]
PAD layout
Recommended
operating frequency
range
*1
[MHz]
20 to 40
Flip Chip Bonding
40 to 55
2.25 to 3.63
20 to 40
Wire Bonding
40 to 55
5075BJ
(5075BK)
(5075BL)
(5075BM)
(5075BN)
*1. The recommended operating frequency is a yardstick value derived from the crystal used for NPC characteristics authentication. However, the oscil-
lation frequency range is not guaranteed. Specifically, the characteristics can vary greatly due to crystal characteristics and mounting conditions, so
the oscillation characteristics of components must be carefully evaluated.
*2. Versions in parentheses ( ) are under development.
5075B1
(5075B2)
(5075B3)
(5075B4)
(5075B5)
(5075AJ)
(5075AK)
(5075AL)
(5075AM)
(5075AN)
Output frequency and version name
*2
f
O
output
(5075A1)
f
O
/2 output
(5075A2)
f
O
/4 output
(5075A3)
f
O
/8 output
(5075A4)
f
O
/16 output
(5075A5)
VERSION NAME
Device
WF5075××–4
Package
Wafer form
Version name
WF5075
Form WF: Wafer form
CF: Chip (Die) form
−4
Oscillation frequency range, frequency divider function
Pad layout type A: for Flip Chip Bonding
B: for Wire Bonding
CF5075××–4
Chip form
SEIKO NPC CORPORATION —2
5075 series
PAD LAYOUT
(Unit:
µm)
I
5075A× (for Flip Chip Bonding)
I
5075B× (for Wire Bonding)
(420, 345)
VSS
Y
VC
5
6
1
(0,0)
2
4
3
(420, 345)
Q
Y VDD
5
6
1
(0,0)
2
4
3
Q
VDD
VSS
VC
(−420,
−345)
XT
X
XTN
(−420,
−345)
XTN
X
XT
Chip size: 0.84
×
0.69mm
Chip thickness: 130µm ± 15µm
PAD size: 90µm
×
90µm
Chip base: V
SS
level
Chip size: 0.84
×
0.69mm
Chip thickness: 130µm ± 15µm
PAD size: 90µm
×
90µm
Chip base: V
SS
level
PAD DIMENSIONS
Pad dimensions [µm]
Pad No.
X
1
2
3
4
5
6
–189
189
315
315
–315
–315
Y
–240
–240
–21
225
225
–21
PIN DESCRIPTION
Pad No.
Pin
5075A×
1
2
3
4
5
6
5075B×
2
1
6
5
4
3
XT
XTN
VDD
Q
VSS
VC
I
O
–
O
–
I
Crystal connection pin (amplifier input)
Crystal connection pin (amplifier output)
(+) supply pin
Clock output pin
(−) supply pin
Oscillation frequency control voltage input pin (positive polarity)
(frequency increases with increasing voltage)
I/O
Description
BLOCK DIAGRAM
Voltage
Regulator
C
IN
R
f
VDD
Oscillation
Detector
R
D
C
OUT
Level Shifter
XT
XTN
R
VC2
VC
R
VC1
C
VC1
C
VC2
1
N
*1
CMOS ouput
Buffer
Q
VSS
*1. N = 1, 2, 4, 8, 16
SEIKO NPC CORPORATION —3
5075 series
ABSOLUTE MAXIMUM RATINGS
V
SS
= 0V
Parameter
Supply voltage range
Input voltage range
Output voltage range
Storage temperature range
Output current
Symbol
V
DD
V
IN
V
OUT
T
STG
I
OUT
Conditions
Between VDD and VSS
Input pins
Output pins
Wafer form, chip form
Q pin
Rating
−0.5
to 7.0
−0.5
to V
DD
+ 0.5
−0.5
to V
DD
+ 0.5
−65
to +150
20
Unit
V
V
V
°C
mA
RECOMMENDED OPERATING CONDITIONS
V
SS
= 0V
Rating
Parameter
Operating supply voltage
Input voltage
Operating temperature
Oscillation frequency
*1
Symbol
V
DD
V
IN
T
OPR
5075×1 to 5075×5
f
O
5075×J to 5075×N
C
LOUT
≤
15pF
5075×1 to 5075×5
5075×J to 5075×N
C
LOUT
≤
15pF
Input pins
Conditions
Min
2.25
V
SS
–40
20
40
1.25
2.5
Typ
–
–
–
–
–
–
–
Max
3.63
V
DD
+85
40
55
40
55
V
V
°C
MHz
MHz
MHz
MHz
Unit
Output frequency
f
OUT
*1. The oscillation frequency is a yardstick value derived from the crystal used for NPC characteristics authentication. However, the oscillation frequency
range is not guaranteed. Specifically, the characteristics can vary greatly due to crystal characteristics and mounting conditions, so the oscillation
characteristics of components must be carefully evaluated.
SEIKO NPC CORPORATION —4
5075 series
ELECTRICAL CHARACTERISTICS
5075×1 to 5075×5
V
DD
= 2.25 to 3.63V, V
C
= 0.5V
DD
, V
SS
= 0V, Ta = –40 to +85°C unless otherwise noted.
Rating
Parameter
Symbol
Conditions
Min
5075×1 (f
O
), Measurement circuit 1,
no load, f
O
= 27MHz, f
OUT
= 27MHz
5075×2 (f
O
/2), Measurement circuit 1,
no load, f
O
= 27MHz, f
OUT
= 13.5MHz
5075×3 (f
O
/4), Measurement circuit 1,
no load, f
O
= 27MHz, f
OUT
= 6.75MHz
5075×4 (f
O
/8), Measurement circuit 1,
no load, f
O
= 27MHz, f
OUT
= 3.38MHz
5075×5 (f
O
/16), Measurement circuit 1,
no load, f
O
= 27MHz, f
OUT
= 1.69MHz
HIGH-level output voltage
LOW-level output voltage
Oscillator block built-in
resistance
V
OH
V
OL
R
VC1
R
VC2
V
C
= 0.3V
C
VC1
Oscillator block built-in
capacitance
C
VC2
Design value (a monitor pattern on a
wafer is tested), Excluding parasitic
capacitance.
V
C
= 1.65V
V
C
= 3.0V
V
C
= 0.3V
V
C
= 1.65V
V
C
= 3.0V
VC input resistance
VC input impedance
VC input capacitance
Modulation
characteristics
*1
R
VIN
Z
VIN
C
VIN
fm
Measurement circuit 4, Ta = 25°C
Measurement circuit 5, V
C
= 0V, f = 10kHz, Ta = 25°C
(a monitor pattern on a wafer is tested)
Measurement circuit 5, V
C
= 0V, f = 10kHz, Ta = 25°C
(a monitor pattern on a wafer is tested)
Measurement circuit 6, –3dB frequency, V
DD
= 3.3V,
V
C
= 3.3Vp-p, Ta = 25°C, f
O
= 27MHz
V
DD
= 2.5V
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 3.3V
V
DD
= 2.5V
V
DD
= 3.3V
–
–
–
–
–
–
–
–
–
–
V
DD
– 0.4
–
210
Measurement circuit 3
210
–
–
–
–
–
–
10
–
–
–
420
5.6
3.1
1.5
8.4
4.7
2.3
–
450
37
25
840
–
–
–
–
–
–
–
–
–
–
kΩ
pF
pF
pF
pF
pF
pF
MΩ
kΩ
pF
kHz
Typ
0.7
1.0
0.6
0.8
0.5
0.7
0.5
0.6
0.4
0.6
–
–
420
Max
1.4
2.0
1.2
1.6
1.0
1.4
1.0
1.2
0.8
1.2
–
0.4
840
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
V
V
kΩ
Unit
Current consumption
I
DD
Q pin, Measurement circuit 2, I
OH
= –2.8mA
Q pin, Measurement circuit 2, I
OL
= 2.8mA
*1. The modulation characteristics may vary with the crystal used.
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