EEWORLDEEWORLDEEWORLD

Part Number

Search

FTR-1-17-52-SM-D-XX-P

Description
Board Connector
CategoryThe connector    The connector   
File Size255KB,2 Pages
ManufacturerSAMTEC
Websitehttp://www.samtec.com/
Download Datasheet Parametric View All

FTR-1-17-52-SM-D-XX-P Overview

Board Connector

FTR-1-17-52-SM-D-XX-P Parametric

Parameter NameAttribute value
Reach Compliance Codecompliant
ECCN codeEAR99
Connector typeBOARD CONNECTOR
Manufacturer's serial numberFTR-1
Base Number Matches1
REVISION AX
PATENT NUMBERS
5713755 / 5961339
FTR-1XX-XX-XX-D-XX-XX
No OF POSITIONS
-02 THRU -50
(PER ROW)
LEAD STYLE
SEE TABLE 1
DO NOT
SCALE FROM
THIS PRINT
(No OF POS x .050 [1.27]) +.002/-.010
[+.05/-.25]
02
100
SEE NOTE 4
.196 4.98
REF
.100 2.54
REF
01
.050 1.27 REF
99
HTMS-50-D
3 MAX SWAY
(EITHER DIRECTION)
PLATING SPECIFICATION
-G: 10µ" GOLD IN CONTACT AREA,
3µ" GOLD ON TAIL
-T: MATTE TIN CONTACT AND TAIL
(LEAD STYLES -01, -02, -03, -51, -52 ONLY)
-S: 30µ" SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
-F: 3µ" FLASH SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
-SM: 30µ" SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
-TM: MATTE TIN CONTACT AND TAIL
(LEAD STYLES -01, -02, -03, -51, -52 ONLY)
-FM: 3µ" FLASH SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
-H: 30µ" HEAVY GOLD IN CONTACT AREA,
3µ" GOLD ON TAIL
-L: 10µ" LIGHT SELECTIVE GOLD IN CONTACT AREA,
MATTE TIN ON TAIL
BODY SPECIFICATION
-D: DOUBLE (USE HTMS-50-D)
OPTION
-P: PICK & PLACE PAD
(USE PPP-22)
(SEE FIG 3, SHT 2)
[5 POS MIN]
-TR: TAPE AND REEL PACKAGING
(POSITIONS -02 THROUGH -50)
OPTION
-A: ALIGNMENT PIN (5 POS MIN)
( SEE FIG 2, SHT 2)
SAMTEC DISCRETION ON WHICH
-A PIN USED.
-LC: STAKED LOCKING CLIP (USE LC-05-TM)
(SEE FIG 4, SHT 2 & NOTE 10)
-XX: POLARIZING SPECIFICATION
XX INDICATES POS TO BE OMMITED
T-1M6-XX-XX-2
.018 0.46 SQ
REF
2 MAX SWAY
(EITHER DIRECTION)
2 MAX SWAY
(EITHER DIRECTION)
.050 1.27 (TYP)
(SEE NOTE 5)
C
CONTACT
AREA
"B"
90°
- 2°
(TYP)
.100 2.54
REF
C
C
+4°
.004 [.10]
.05 1.3
(SEE NOTE 7)
NOTES:
1.
C
REPRESENTS A CRITICAL DIMENSION.
2. MAXIMUM CUT FLASH: .010[.25].
3. MINIMUM PUSHOUT FORCE: 2 LB.
4. MAXIMUM PIN ROTATION IN BODY: 2°.
5. SHEAR TAILS TO DIMENSION SHOWN.
6. MAXIMUM BURR ALLOWANCE: .003[.08]
7. MEASURED AT BEND RADIUS.
8. TUBE POSITIONS -05 AND GREATER; LAYER
PACKAGE POSITIONS -02 THRU -04.
9. -P OPTION: TUBE POSITIONS -07 THRU -50;
ALL OTHERS, TAPE & REEL ONLY.
10. DUE TO HIGH AMOUNT OF INSERTION FORCE
NEEDED, THE -LC OPTION IS NOT COMPATIBLE
WITH AUTO PLACEMENT. SAMTEC RECOMENDS
MANUAL PLACEMENT FOR ALL ASSEMBLIES
WITH THE -LC OPTION.
FIG 1
FTR-1XX-XX-D SHOWN
.2960 7.518 REF
UNLESS OTHERWISE SPECIFIED,
DIMENSIONS ARE IN INCHES.
TOLERANCES ARE:
.X: .1 [2.5]
.XX: .01 [.3]
2
.XXX: .005 [.13]
.XXXX: .0020 [.051]
MATERIAL:
PROPRIETARY NOTE
THIS DOCUMENT CONTAINS INFORMATION
CONFIDENTIAL AND PROPRIETARY TO
SAMTEC, INC. AND SHALL NOT BE REPRODUCED
OR TRANSFERRED TO OTHER DOCUMENTS OR
DISCLOSED TO OTHERS OR USED FOR ANY
PURPOSE OTHER THAN THAT WHICH IT WAS
OBTAINED WITHOUT THE EXPRESSED WRITTEN
CONSENT OF SAMTEC, INC.
DECIMALS
ANGLES
520 PARK EAST BLVD, NEW ALBANY, IN 47150
PHONE: 812-944-6733
FAX: 812-948-5047
e-Mail info@SAMTEC.com
code 55322
DESCRIPTION:
DWG. NO.
DO NOT SCALE DRAWING
SHEET SCALE: 2:1
INSULATOR: LCP, UL 94 VO, COLOR: BLACK
TERMINAL: PHOS BRONZE
HI-TEMP TERMINAL MICRO-STRIP (DOUBLE ROW)
FTR-1XX-XX-XX-D-XX-XX
12/12/2000
SHEET
1
OF
2
F:\DWG\MISC\MKTG\FTR-1XX-XX-XX-D-XX-XX-MKT.SLDDRW
BY:
DEAN P
[I contribute to the XILINX Resource Center] Xilinx Spartan-3E development board schematics
XILINX SPARTAN3 development board schematic diagram...
wanghongyang FPGA/CPLD
EEWORLD University ---- Atmel SAM D21 PTC noise suppression function (Part 2)
Atmel SAM D21 PTC noise suppression function (Part 2) : https://training.eeworld.com.cn/course/21The criteria for noise sources and noise suppression, as well as the parameters used, how to change the...
dongcuipin MCU
Share together!!! 2015 National Competition Question D
[size=4][color=#0000ff]In the next few days, it may be time for the National College Students Electronics Contest again. Maybe many students have been practicing the questions of previous years. I met...
RF-刘海石 RF/Wirelessly
Fujitsu FRAM Experience Submission
[i=s]This post was last edited by machinnneee on 2013-12-26 12:45[/i] I am currently working on a radio frequency identification device. In the early design process, I used an SD card to read the ID n...
machinnneee Integrated technical exchanges
51 single chip microcomputer controls ISD1420 to realize the function of selecting and playing segments (C program circuit diagram)
[i=s] This post was last edited by paulhyde on 2014-9-15 03:06 [/i] 51 MCU controls ISD1420 to realize the function of selecting and playing (C program circuit diagram)...
xfh168168 Electronics Design Contest
[N32L43X Review] 1. Getting Started Environment Configuration
My level is limited, so I'll just throw out some ideas 1. Jinlk tool adds N32 information In N32L43xxx\N32L43xxx\6-Software Development Kit You can find the jlink tool to add Nationstech chip V1.0.4. ...
dyc1229 Domestic Chip Exchange

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1190  1825  2479  1742  694  24  37  50  36  14 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号