SI5345A-D06761-GMR datasheet, PDF

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> SI5345A-D06761-GMR

SI5345A-D06761-GMR: DescriptionProcessor Specific Clock Generator,; CategoryThe embedded processor and controller Microcontrollers and processors; File Size912KB，58 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

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SI5345A-D06761-GMR Overview

Processor Specific Clock Generator,

SI5345A-D06761-GMR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
package instruction	HVQCCN,
Reach Compliance Code	unknown
JESD-30 code	S-XQCC-N64
length	9 mm
Humidity sensitivity level	2
Number of terminals	64
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Maximum output clock frequency	1028 MHz
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Master clock/crystal nominal frequency	750 MHz
Maximum seat height	0.9 mm
Maximum supply voltage	1.89 V
Minimum supply voltage	1.71 V
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	40
width	9 mm
uPs/uCs/peripheral integrated circuit type	CLOCK GENERATOR, PROCESSOR SPECIFIC
Base Number Matches	1

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Si5345/44/42 Rev D Data Sheet

10-Channel, Any-Frequency, Any-Output Jitter Attenuator/

Clock Multiplier

These jitter attenuating clock multipliers combine fourth-generation DSPLL

™

and

MultiSynth

™

technologies to enable any-frequency clock generation and jitter attenu-

ation for applications requiring the highest level of jitter performance. These devices

are programmable via a serial interface with in-circuit programmable non-volatile

memory (NVM) so they always power up with a known frequency configuration. They

support free-run, synchronous, and holdover modes of operation, and offer both au-

tomatic and manual input clock switching. The loop filter is fully integrated on-chip,

eliminating the risk of noise coupling associated with discrete solutions. Furthermore,

the jitter attenuation bandwidth is digitally programmable, providing jitter perform-

ance optimization at the application level. Programming the Si5345/44/42 is easy

with Silicon Labs’

ClockBuilder Pro

™

software. Factory preprogrammed devices are

also available.

Applications:

• OTN muxponders and transponders

• 10/40/100 G networking line cards

• GbE/10 GbE/100 GbE Synchronous Ethernet (ITU-T G.8262)

• Carrier Ethernet switches

• SONET/SDH line cards

• Broadcast video

• Test and measurement

• ITU-T G.8262 (SyncE) compliant

25-54 MHz XTAL

OSC

IN0

4 Input

Clocks

IN1

IN2

÷FRAC

DSPLL

Si5342

MultiSynth

÷INT

Status Flags

I2C / SPI

Status Monitor

Control

NVM

÷INT

OUT0

OUT1

OUT2

OUT3

OUT4

OUT5

OUT6

OUT7

Si5345

OUT8

OUT9

KEY FEATURES

• Generates any combination of output

frequencies from any input frequency

• Ultra-low jitter of 90 fs rms

• External Crystal: 25 to 54 MHz

• Input frequency range

• Differential: 8 kHz to 750 MHz

• LVCMOS: 8 kHz to 250 MHz

• Output frequency range

• Differential: 100 Hz to 1028 MHz

• LVCMOS: 100 Hz to 250 MHz

• Meets G.8262 EEC Option 1, 2 (SyncE)

• Highly configurable outputs compatible with

LVDS, LVPECL, LVCMOS, CML, and HCSL

with programmable signal amplitude

• Si5345: 4 input, 10 output, 64-QFN 9×9 mm

• Si5344: 4 input, 4 output, 44-QFN 7×7 mm

• Si5342: 4 input, 2 output, 44-QFN 7×7 mm

Si5344

Up to 10

Output Clocks

IN3/FB_IN

silabs.com

| Building a more connected world.

Rev. 1.2

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