UPSD3434EV-40T6T datasheet, PDF

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UPSD3434EV-40T6T: DescriptionFast Turbo 8032 MCU with USB and Programmable Logic; CategoryThe embedded processor and controller Microcontrollers and processors; File Size90KB，9 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/; Environmental Compliance

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UPSD3434EV-40T6T Overview

Fast Turbo 8032 MCU with USB and Programmable Logic

UPSD3434EV-40T6T Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	STMicroelectronics
Parts packaging code	QFP
package instruction	TQFP-52
Contacts	52
Reach Compliance Code	compli
ECCN code	3A991.A.2
Has ADC	YES
Address bus width
bit size	8
CPU series	8051
maximum clock frequency	40 MHz
DAC channel	NO
DMA channel	NO
External data bus width
JESD-30 code	S-PQFP-G52
length	10 mm
Number of I/O lines	35
Number of terminals	52
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
PWM channel	YES
Package body material	PLASTIC/EPOXY
encapsulated code	LQFP
Encapsulate equivalent code	QFP52,.47SQ
Package shape	SQUARE
Package form	FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	3.3 V
Certification status	Not Qualified
RAM (bytes)	8192
rom(word)	262144
ROM programmability	FLASH
Maximum seat height	1.6 mm
speed	40 MHz
Maximum supply voltage	3.6 V
Minimum supply voltage	3 V
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED
width	10 mm
uPs/uCs/peripheral integrated circuit type	MICROCONTROLLER

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uPSD34xx

Turbo Plus Series

Fast Turbo 8032 MCU with USB and Programmable Logic

DATA BRIEFING

FEATURES SUMMARY

■

FAST 8-BIT TURBO 8032 MCU, 40MHz

– Advanced core, 4-clocks per instruction

– 10 MIPs peak performance at 40MHz (5V)

– JTAG Debug and In-System

Programming

– 16-bit internal instruction path fetches

double-byte instruction in a single memory

cycle

– Branch Cache & 4 instruction Prefetch

Queue

– Dual XDATA pointers with automatic

increment and decrement

– Compatible with 3rd party 8051 tools

DUAL FLASH MEMORIES WITH MEMORY

MANAGEMENT

– Place either memory into 8032 program

address space or data address space

– READ-while-WRITE operation for In-

Application Programming and EEPROM

emulation

– Single voltage program and erase

– 100K guaranteed erase cycles, 15-year

retention

CLOCK, RESET, AND POWER SUPPLY

MANAGEMENT

– SRAM is Battery Backup capable

– Flexible 8-level CPU clock divider register

– Normal, Idle, and Power Down Modes

– Power-on and Low Voltage reset

supervisor

– Programmable Watchdog Timer

PROGRAMMABLE LOGIC, GENERAL

PURPOSE

– 16 macrocells for logic applications (e.g.,

shifters, state machines, chip-selects,

glue-logic to keypads, and LCDs)

A/D CONVERTER

– Eight Channels, 10-bit resolution, 6µs

Figure 1. Packages

TQFP52 (T), 52-lead, Thin, Quad, Flat

TQFP80 (U), 80-lead, Thin, Quad, Flat

■

COMMUNICATION INTERFACES

– USB v2.0 Full Speed (12Mbps)

10 endpoint pairs (In/Out), each endpoint

with 64-byte FIFO (supports Control, Intr,

and Bulk transfer types)

– I

C Master/Slave controller, 833kHz

– SPI Master controller, 1MHz

– Two UARTs with independent baud rate

– IrDA Potocol: up to 115 kbaud

– Up to 46 I/O, 5V tolerant uPSD34xxV

TIMERS AND INTERRUPTS

– Three 8032 standard 16-bit timers

– Programmable Counter Array (PCA), six

16-bit modules for PWM, CAPCOM, and

timers

– 8/10/16-bit PWM operation

– 12 Interrupt sources with two external

interrupt pins

OPERATING VOLTAGE SOURCE (±10%)

– 5V Devices: 5.0V and 3.3V sources

– 3.3V Devices: 3.3V source

February 2005

For further information contact your local ST sales office.

1/9

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