CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
V
SUPPLY
=
±15V
TEMP
(
o
C)
HA-2520-2
MIN
TYP
MAX
MIN
HA-2522-2
TYP
MAX
MIN
HA-2525-5
TYP
MAX
UNITS
PARAMETER
INPUT CHARACTERISTICS
Offset Voltage
25
Full
-
-
-
-
-
-
-
50
±10.0
4
-
20
100
-
10
-
100
-
8
11
-
200
400
25
50
-
-
-
-
-
-
-
-
-
40
±10.0
5
-
25
125
-
20
-
100
-
10
14
-
250
500
50
100
-
-
-
-
-
-
-
-
-
40
±10.0
5
-
30
125
-
20
-
100
-
10
14
-
250
500
50
100
-
-
mV
mV
µV/
o
C
nA
nA
nA
nA
MΩ
V
Offset Voltage Drift
Bias Current
Full
25
Full
Offset Current
25
Full
Input Resistance (Note 2)
Common Mode Range
TRANSFER CHARACTERISTICS
Large Signal Voltage Gain
(Notes 3, 6)
Common Mode Rejection Ratio
(Note 4)
Gain Bandwidth (Notes 2, 5)
Minimum Stable Gain
OUTPUT CHARACTERISTICS
Output Voltage Swing (Note 3)
Output Current (Note 6)
Full Power Bandwidth
(Notes 6, 11)
TRANSIENT RESPONSE
(A
V
= +3)
Rise Time (Notes 3, 7, 8, 10)
Overshoot (Notes 3, 7, 8, 10)
Slew Rate (Notes 3, 7, 10, 12)
Settling Time (Notes 3, 7, 10, 12)
25
Full
25
Full
Full
25
25
10
7.5
80
10
3
15
-
90
20
-
-
-
-
-
-
7.5
5
74
10
3
15
-
90
20
-
-
--
-
-
-
7.5
5
74
10
3
15
-
90
20
-
-
-
-
-
-
kV/V
kV/V
dB
MHz
V/V
Full
25
25
±10.0
±10
1.5
±12.0
±20
2.0
-
-
-
±10.0
±10
1.2
±12.0
±20
2.0
-
-
-
±10.0
±10
1.2
±12.0
±20
2.0
-
-
-
V
mA
MHz
25
25
25
25
-
-
±100
-
25
25
±120
0.20
50
40
-
-
-
-
±80
-
25
25
±120
0.20
50
50
-
-
-
-
±80
-
25
25
±120
0.20
50
50
-
-
ns
%
V/µs
µs
3-189
HA-2520, HA-2522, HA-2525
Electrical Specifications
V
SUPPLY
=
±15V
(Continued)
TEMP
(
o
C)
HA-2520-2
MIN
TYP
MAX
MIN
HA-2522-2
TYP
MAX
MIN
HA-2525-5
TYP
MAX
UNITS
PARAMETER
POWER SUPPLY CHARACTERISTICS
Supply Current
Power Supply Rejection Ratio (Note 9)
25
Full
-
80
4
90
6
-
-
74
4
90
6
-
-
74
4
90
6
-
mA
dB
NOTES:
2. This parameter value is based on design calculations.
3. R
L
= 2kΩ.
4. V
CM
=
±10V.
5. A
V
> 10.
6. V
O
=
±10.0V.
7. C
L
= 50pF.
8. V
O
=
±200mV.
9.
∆V
=
±5.0V.
10. See Transient Response Test Circuits and Waveforms.
Slew Rate
11. Full Power Bandwidth guaranteed based on slew rate measurement using: FPBW
= ----------------------------
.
-
2πV PEAK
12. V
OUT
=
±5V.
Test Circuits and Waveforms
+1.67V
INPUT
-1.67V
+5V
90%
OUTPUT
-5V
10%
∆t
∆V
SLEW
RATE
=
∆V/∆t
ERROR BAND
±10mV
FROM
FINAL VALUE
±67mV
INPUT
0V
OVERSHOOT
±200mV
90%
OUTPUT
10%
0V
RISE TIME
SETTLING
TIME
NOTE: Measured on both positive and negative transitions from 0V
to +200mV and 0V to -200mV at the output.
FIGURE 2. TRANSIENT RESPONSE
V+
1µF
FIGURE 1. SLEW RATE AND SETTLING TIME
INPUT
667.2Ω
2
7
0.001µF
6
4
1µF
100pF
OUTPUT
3 +
-
IN
+
1667Ω
OUT
5pF
1333Ω
50pF
D
2N4416
S
667Ω
2000Ω
CR
1
CR
2
G
V-
0.001µF
2001Ω
-
4999.9Ω
SETTLING TIME
TEST POINT
NOTES:
13. A
V
= -3.
14. Feedback and summing resistor ratios should be 0.1% matched.
15. Clipping diodes CR
1
and CR
2
are optional. HP5082-2810
recommended.
FIGURE 3. SLEW RATE AND TRANSIENT RESPONSE
FIGURE 4. SETTLING TIME TEST CIRCUIT
3-190
HA-2520, HA-2522, HA-2525
Test Circuits and Waveforms
(Continued)
V+
20kΩ
IN
BAL.
OUT
COMP
C
C
V-
NOTE: Tested offset adjustment range is |V
OS
+ 1mV| minimum referred to output. Typical ranges are
±20mV
with R
T
= 20kΩ.
FIGURE 5. SUGGESTED V
OS
ADJUSTMENT AND COMPENSATION HOOK-UP
Schematic Diagram
OFFSET
-
BAL 1
PIN 1
200
R
2AA
R
21
Q
29
R
11
R
13
Q
28
R
16
Q
27
+INPUT
R
15
Q
1A
Q
2A
Q
17
R
1A
Q
18
Q
31
Q
26
Q
25
R
6A
Q
22
R
6B
Q
19
Q
20
Q
21A
Q
21B
Q
5A
R
3A
Q
2B
Q
1B
Q
11B
Q
4A
Q
4B
Q
16
440
1.8K
R
2A
Q
3A
OFFSET+
BAL 2
200
R
2BB
R
10
440
1.8K
R
2B
Q
3B
Q
15
Q
23
R
9
Q
8
D
138
R
17
50
Q
12B
R
18
30
D
13A
Q
6
Q
9
Q
5B
R
3B
Q
10
D
14
R
19
R
10
V-
Q
11A
Q
12A
R
12
COMP
V+
Q
30
C
1
1pF
OUTPUT
R
1B
Q
24
Q
7
-INPUT
3-191
HA-2520, HA-2522, HA-2525
Typical Application
Inverting Unity Gain Circuit
Figure 6 shows a Compensation Circuit for an inverting unity
gain amplifier. The circuit was tested for functionality with sup-
ply voltages from
±4V
to
±15V,
and the performance as tested
was: Slew Rate
≈
120V/µs; Bandwidth
≈
10MHz; and Settling
Time (0.1%)
≈
500ns. Figure 7 illustrates the amplifier’s fre-
quency response, and it is important to note that capacitance
at pin 8 must be minimized for maximum bandwidth.
10K
10K
IN
2K
500pF
5K
10K
100K
1M
10M
+
HA-2520
10
GAIN (dB)
5
GAIN
0
-5
-10
PHASE
0
-45
-90
-135
-180
-
OUT
-15
FIGURE 6. INVERTING UNITY GAIN CIRCUIT
FIGURE 7. FREQUENCY RESPONSE FOR INVERTING UNITY
GAIN CIRCUIT
Typical Performance Curves
6
5
OFFSET VOLTAGE (mV)
4
3
2
1
0
-1
-2
-3
-60
V
S
=
±15V,
T
A
= 25
o
C, Unless Otherwise Specified
-40
-50
-60
BIAS CURRENT (nA)
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-60
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (
o
C)
TEMPERATURE (
o
C)
FIGURE 8. OFFSET VOLTAGE vs TEMPERATURE (6 TYPICAL
UNITS FROM 3 LOTS)
FIGURE 9. BIAS CURRENT vs TEMPERATURE (6 TYPICAL
UNITS FROM 3 LOTS)
40
OFFSET BIAS CURRENT (nA)
30
20
10
0
-10
-20
-30
-60
A
VOL
(kV/ V)
-40
-20
0
20
40
60
80
100
120
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
-60
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (
o
C)
TEMPERATURE (
o
C)
FIGURE 10. OFFSET CURRENT vs TEMPERATURE (5 TYPICAL
UNITS FROM 3 LOTS)
FIGURE 11. OPEN LOOP GAIN vs TEMPERATURE (6 TYPICAL
京公网安备 11010802033920号
EEWORLD
