EEWORLDEEWORLDEEWORLD

Part Number

Search

A54SX32-PL208PP

Description
FPGA, 1452 CLBS, 16000 GATES, 320 MHz, PQFP208
Categorysemiconductor    Programmable logic devices   
File Size363KB,57 Pages
ManufacturerETC
Download Datasheet Parametric View All

A54SX32-PL208PP Overview

FPGA, 1452 CLBS, 16000 GATES, 320 MHz, PQFP208

A54SX32-PL208PP Parametric

Parameter NameAttribute value
Number of terminals208
Minimum operating temperature-55 Cel
Maximum operating temperature125 Cel
Processing package descriptionPLASTIC, MO-143, QFP-208
each_compliYes
stateActive
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
clock_frequency_max320 MHz
The maximum delay of a CLB module0.7000 ns
jesd_30_codeS-PQFP-G208
jesd_609_codee0
moisture_sensitivity_level3
Number of configurable logic modules1452
Number of equivalent gate circuits16000
organize1452 CLBS, 16000 GATES
Packaging MaterialsPLASTIC/EPOXY
ckage_codeFQFP
packaging shapeSQUARE
Package SizeFLATPACK, FINE PITCH
eak_reflow_temperature__cel_225
qualification_statusCOMMERCIAL
seated_height_max4.1 mm
Rated supply voltage3.3 V
Minimum supply voltage3 V
Maximum supply voltage3.6 V
surface mountYES
CraftsmanshipCMOS
Temperature levelMILITARY
terminal coatingTIN LEAD
Terminal formGULL WING
Terminal spacing0.5000 mm
Terminal locationQUAD
ime_peak_reflow_temperature_max__s_30
length28 mm
width28 mm
dditional_featureCAN ALSO BE OPERATED AT 5V; 24000 SYSTEM GATES ALSO AVAILABLE
v3.1
54SX Family FPGAs
Le a di ng E dg e P er f or m a nc e
F ea t u r es
• 320 MHz Internal Performance
• 3.7 ns Clock-to-Out (Pin-to-Pin)
• 0.1 ns Input Set-Up
• 0.25 ns Clock Skew
Sp e ci f ic at ion s
• 66 MHz PCI
• CPLD and FPGA Integration
• Single Chip Solution
• 100% Resource Utilization with 100% Pin Locking
• 3.3V Operation with 5.0V Input Tolerance
• Very Low Power Consumption
• Deterministic, User-Controllable Timing
• Unique In-System Diagnostic and Debug capability with
Silicon Explorer II
• Boundary Scan Testing in Compliance with IEEE Standard
1149.1 (JTAG)
• Secure Programming Technology Prevents Reverse
Engineering and Design Theft
• 12,000 to 48,000 System Gates
• Up to 249 User-Programmable I/O Pins
• Up to 1080 Flip-Flops
• 0.35µ CMOS
S X P r od u c t P ro fi l e
A54SX08
Capacity
Typical Gates
System Gates
Logic Modules
Combinatorial Cells
Register Cells (Dedicated Flip-Flops)
Maximum User I/Os
Clocks
JTAG
PCI
Clock-to-Out
Input Set-Up (External)
Speed Grades
Temperature Grades
Packages (by pin count)
PLCC
PQFP
VQFP
TQFP
PBGA
FBGA
8,000
12,000
768
512
256
130
3
Yes
3.7 ns
0.8 ns
Std, –1, –2, –3
C, I, M
84
208
100
144, 176
144
A54SX16
16,000
24,000
1,452
924
528
175
3
Yes
3.9 ns
0.5 ns
Std, –1, –2, –3
C, I, M
208
100
176
A54SX16P
16,000
24,000
1,452
924
528
175
3
Yes
Yes
4.4 ns
0.5 ns
Std, –1, –2, –3
C, I, M
208
100
144, 176
A54SX32
32,000
48,000
2,880
1800
1,080
249
3
Yes
4.6 ns
0.1 ns
Std, –1, –2, –3
C, I, M
208
144, 176
313, 329
June 2003
1
© 2003 Actel Corporation
Electronics competitions that college students can participate in~~
[i=s]This post was last edited by paulhyde on 2014-9-15 08:53[/i] Model aircraft competition, China Aviation and Navigation Robot Competition (I think that's what it's called, one year it was called t...
banana Robotics Development
Switching power supply design experience - repost
In general: 1. There should be a clear layout distinction between AC input and DC output, and the best way is to isolate them from each other. 2. The wiring distance between the input and output (incl...
zero3360 Power technology
What is the difference between PTH and NPTH
PTH is a plating through hole, which has copper in the hole wall, and is generally a via hole (VIA) and a component hole. NPTH is a non-plating through hole, which has no copper in the hole wall, and ...
咖啡不加糖 PCB Design
Japan Goot RX760 soldering station HD pictures disassembly appreciation
[i=s] This post was last edited by ylyfxzsx on 2016-9-25 15:59 [/i] [size=4]I like to go to the electronics market and collect some foreign electronic products. In a small corner, I found this goot so...
ylyfxzsx Creative Market
How to restore the default HIVE registry of wince
A Sate210 customer asked me [b][color=#ff0000]GM, [/color][/b] [b][color=#ff0000] We changed the registry to RAM-BASED, and it can start, but when I opened my device, the nandflash folder was gone, so...
Wince.Android Embedded System
How complicated is the inside of a sweeping robot? TI E2E will reveal the secrets for you in five steps! Answer the questions and win prizes...
[font=微软雅黑][size=3][color=#ff0000][b]Event details: [/b][/color][/size][/font][url=https://bbs.eeworld.com.cn/huodong/TI_E2E_Q2_201906/index.php?sid=107][b][font=微软雅黑][color=#000000]How complicated is...
EEWORLD社区 TI Technology Forum

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 753  1339  1210  1886  498  16  27  25  38  11 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号