FDG6317NZ
January 2004
FDG6317NZ
Dual 20v N-Channel PowerTrench
®
MOSFET
General Description
This dual N-Channel MOSFET has been designed
specifically to improve the overall efficiency of DC/DC
converters using either synchronous or conventional
switching PWM controllers. It has been optimized use
in small switching regulators, providing an extremely
low R
DS(ON)
and gate charge (Q
G
) in a small package.
Features
•
0.7 A, 20 V.
R
DS(ON)
= 400 mΩ @ V
GS
= 4.5 V
R
DS(ON)
= 550 mΩ @ V
GS
= 2.5 V
•
ESD protection diode (note 3)
•
Low gate charge
•
High performance trench technology for extremely
low R
DS(ON)
•
Compact industry standard SC70-6 surface mount
package
Applications
•
DC/DC converter
•
Power management
•
Loadswitch
S
G
D
D
G
Pin 1
S
SC70-6
The pinouts are symmetrical; pin 1 and pin 4 are interchangeable.
Absolute Maximum Ratings
Symbol
V
DSS
V
GSS
I
D
P
D
T
J
, T
STG
Drain-Source Voltage
Gate-Source Voltage
Drain Current
– Continuous
– Pulsed
T
A
=25
o
C unless otherwise noted
Parameter
Ratings
20
±
12
(Note 1)
Units
V
V
A
W
°C
0.7
2.1
0.3
–55 to +150
Power Dissipation for Single Operation
(Note 1)
Operating and Storage Junction Temperature Range
Thermal Characteristics
R
θJA
Thermal Resistance, Junction-to-Ambient
(Note 1)
415
°C/W
Package Marking and Ordering Information
Device Marking
.67
Device
FDG6317NZ
Reel Size
7’’
Tape width
8mm
Quantity
3000 units
©2004
Fairchild Semiconductor Corporation
FDG6317NZ Rev B (W)
FDG6317NZ
Electrical Characteristics
Symbol
BV
DSS
∆BV
DSS
∆T
J
I
DSS
I
GSS
I
GSS
T
A
= 25°C unless otherwise noted
Parameter
Test Conditions
Min
20
Typ
Max Units
V
Off Characteristics
Drain–Source Breakdown
V
GS
= 0 V,
I
D
= 250
µA
Voltage
Breakdown Voltage Temperature I
D
= 250
µA,
Referenced to 25°C
Coefficient
Zero Gate Voltage Drain Current V
DS
= 16 V, V
GS
= 0 V
Gate–Body Leakage
Gate–Body Leakage
(Note 2)
13
1
±
10
±
1
mV/°C
µA
µA
µA
V
GS
=
±
12 V, V
DS
= 0 V
V
GS
=
±
4.5 V, V
DS
= 0 V
I
D
= 250
µA
On Characteristics
V
GS(th)
∆V
GS(th)
∆T
J
R
DS(on)
Gate Threshold Voltage
Gate Threshold Voltage
Temperature Coefficient
Static Drain–Source
On–Resistance
On–State Drain Current
Forward Transconductance
V
DS
= V
GS
,
0.6
1.2
–2
300
450
390
1.5
V
mV/°C
I
D
= –250
µA,
Referenced to 25°C
V
GS
= 4.5 V,
V
GS
= 2.5 V,
V
GS
= 4.5 V,
V
GS
= 4.5 V,
V
DS
= 5 V,
I
D
= 0.7 A
I
D
= 0.6 A
I
D
= 0.7 A, T
J
=125°C
V
DS
= 5 V
I
D
= 0.7 A
400
550
560
mΩ
I
D(on)
g
FS
1
1.8
A
S
Dynamic Characteristics
C
iss
C
oss
C
rss
R
G
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Gate Resistance
(Note 2)
V
DS
= 10 V,
f = 1.0 MHz
V
GS
= 0 V,
66.5
19
10
5.8
pF
pF
pF
Ω
V
GS
= 15 mV, f = 1.0 MHz
Switching Characteristics
t
d(on)
t
r
t
d(off)
t
f
Q
g
Q
gs
Q
gd
I
S
V
SD
t
rr
Q
rr
Turn–On Delay Time
Turn–On Rise Time
Turn–Off Delay Time
Turn–Off Fall Time
Total Gate Charge
Gate–Source Charge
Gate–Drain Charge
V
DD
= 10 V, I
D
= 1 A,
V
GS
= 4.5 V, R
GEN
= 6
Ω
5.5
7
7.5
2.5
11
15
15
5
1.1
ns
ns
ns
ns
nC
nC
nC
V
DS
= 10 V,
V
GS
= 4.5 V
I
D
= 0.7 A,
0.76
0.18
0.20
Drain–Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain–Source Diode Forward Current
Drain–Source Diode Forward
Voltage
Diode Reverse Recovery Time
Diode Reverse Recovery Charge
V
GS
= 0 V,
I
F
= 0.7 A,
I
S
= 0.25 A
(Note 2)
0.25
0.8
8.3
1.2
1.2
A
V
nS
nC
d
iF
/d
t
= 100 A/µs
Notes:
1.
R
θJA
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of
the drain pins. R
θJC
is guaranteed by design while R
θJA
is determined by the user's board design. R
θJA
= 415°C/W when mounted on a minimum pad .
2.
Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
3.
The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
FDG6317NZ Rev B (W)
FDG6317NZ
Typical Characteristics
2
V
GS
= 10V
I
D
, DRAIN CURRENT (A)
4.5V
1.5
2.0V
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
3.0V
2.5V
1.7
V
GS
= 2.5V
1.5
1
1.3
3.0V
3.5V
4.0V
2.0V
0.5
1.1
4.5V
6.0V
10V
0
0
0.5
1
1.5
2
2.5
V
DS
, DRAIN-SOURCE VOLTAGE (V)
0.9
0
0.5
1
I
D
, DRAIN CURRENT (A)
1.5
2
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with
Drain Current and Gate Voltage.
1
R
DS(ON)
, ON-RESISTANCE (OHM)
1.5
R
DS(ON)
, NORMALIZED
DRAIN-SOURCE ON-RESISTANCE
1.4
1.3
1.2
1.1
1
0.9
0.8
0.7
-50
-25
0
25
50
75
100
125
150
T
J
, JUNCTION TEMPERATURE (
o
C)
I
D
= 0.7A
V
GS
=10V
I
D
= 0.35A
0.8
0.6
T
A
= 125
o
C
0.4
T
A
= 25
o
C
0.2
0
2
4
6
8
10
V
GS
, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with
Temperature.
2
V
DS
= 5V
I
D
, DRAIN CURRENT (A)
1.5
25
o
C
1
I
S
, REVERSE DRAIN CURRENT (A)
T
A
= 125 C
o
Figure 4. On-Resistance Variation with
Gate-to-Source Voltage.
10
-55 C
o
V
GS
= 0V
1
T
A
= 125
o
C
0.1
25 C
0.01
-55
o
C
0.001
o
0.5
0
0
1
2
3
4
V
GS
, GATE TO SOURCE VOLTAGE (V)
0.0001
0
0.2
0.4
0.6
0.8
1
1.2
1.4
V
SD
, BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with
Source Current and Temperature.
FDG6317NZ Rev B (W)
FDG6317NZ
Typical Characteristics
5
V
GS
, GATE-SOURCE VOLTAGE (V)
I
D
= 0.7A
4
10V
3
CAPACITANCE (pF)
100
V
DS
= 5V
15V
f = 1MHz
V
GS
= 0 V
75
C
iss
50
2
C
oss
25
1
C
rss
0
0
0.2
0.4
0.6
0.8
1
Q
g
, GATE CHARGE (nC)
0
0
5
10
15
20
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
Figure 7. Gate Charge Characteristics.
10
P(pk), PEAK TRANSIENT POWER (W)
R
DS(ON)
LIMIT
I
D
, DRAIN CURRENT (A)
100µs
1
1s
0.1
V
GS
= 10V
SINGLE PULSE
R
θJA
= 415
o
C/W
T
A
= 25 C
0.001
0.1
1
10
100
V
DS
, DRAIN-SOURCE VOLTAGE (V)
o
Figure 8. Capacitance Characteristics.
10
SINGLE PULSE
R
θJA
= 415°C/W
T
A
= 25°C
1ms
10ms
100m
DC
8
6
4
0.01
2
0
0.0001
0.001
0.01
0.1
1
10
100
1000
t
1
, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum
Power Dissipation.
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
1
D = 0.5
R
θJA
(t) = r(t)*R
θJA
R
θJA
= 415°C/W
0.1
0.05
0.02
0.01
SINGLE PULSE
0.2
0.1
P(pk
)
t
1
t
2
T
J
- T
A
= P * R
θJA
(t)
Duty Cycle, D = t
1
/ t
2
0.01
0.0001
0.001
0.01
0.1
t
1
, TIME (sec)
1
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1.
Transient thermal response will change depending on the circuit board design.
FDG6317NZ Rev B (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™
FACT Quiet Series™
ActiveArray™
FAST
Bottomless™
FASTr™
CoolFET™
FPS™
CROSSVOLT™
FRFET™
DOME™
GlobalOptoisolator™
EcoSPARK™ GTO™
E
2
CMOS
TM
HiSeC™
TM
EnSigna
I
2
C™
FACT™
ImpliedDisconnect™
Across the board. Around the world.™
The Power Franchise™
Programmable Active Droop™
DISCLAIMER
ISOPLANAR™
LittleFET™
MICROCOUPLER™
MicroFET™
MicroPak™
MICROWIRE™
MSX™
MSXPro™
OCX™
OCXPro™
OPTOLOGIC
OPTOPLANAR™
PACMAN™
POP™
Power247™
PowerSaver™
PowerTrench
QFET
QS™
QT Optoelectronics™
Quiet Series™
RapidConfigure™
RapidConnect™
SILENT SWITCHER
SMART START™
SPM™
Stealth™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SyncFET™
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TINYOPTO™
TruTranslation™
UHC™
UltraFET
VCX™
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
2. A critical component is any component of a life
1. Life support devices or systems are devices or
support device or system whose failure to perform can
systems which, (a) are intended for surgical implant into
be reasonably expected to cause the failure of the life
the body, or (b) support or sustain life, or (c) whose
support device or system, or to affect its safety or
failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Advance Information
Product Status
Formative or
In Design
Definition
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I8
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