EEWORLDEEWORLDEEWORLD

Part Number

Search

8521BY

Description
Low Skew Clock Driver, 8521 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32
Categorylogic    logic   
File Size204KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

8521BY Overview

Low Skew Clock Driver, 8521 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32

8521BY Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
Parts packaging codeQFP
package instructionLQFP, QFP32,.35SQ,32
Contacts32
Reach Compliance Codenot_compliant
ECCN codeEAR99
series8521
Input adjustmentDIFFERENTIAL MUX
JESD-30 codeS-PQFP-G32
JESD-609 codee0
length7 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals32
Actual output times9
Maximum operating temperature70 °C
Minimum operating temperature
Package body materialPLASTIC/EPOXY
encapsulated codeLQFP
Encapsulate equivalent codeQFP32,.35SQ,32
Package shapeSQUARE
Package formFLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius)240
power supply1.8,3.3 V
Prop。Delay @ Nom-Sup1.8 ns
propagation delay (tpd)1.8 ns
Certification statusNot Qualified
Same Edge Skew-Max(tskwd)0.05 ns
Maximum seat height1.6 mm
Maximum supply voltage (Vsup)3.465 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.8 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width7 mm
minfmax500 MHz
Base Number Matches1
ICS8521
L
OW
S
KEW
, 1-
TO
-9
D
IFFERENTIAL
-
TO
-HSTL F
ANOUT
B
UFFER
G
ENERAL
D
ESCRIPTION
The ICS8521 is a low skew, 1-to-9 Differential-to-HSTL
Fanout Buffer. The ICS8521 has two selectable clock
inputs. The CLK, nCLK pair can accept most standard
differential input levels. The PCLK, nPCLK pair can accept
LVPECL, CML, or SSTL input levels. The clock enable is
internally synchronized to eliminate runt pulses on the
outputs during asynchronous assertion/deassertion of the
clock enable pin.
Guaranteed output skew, part-to-part skew and crossover
voltage characteristics make the ICS8521 ideal for today’s
most advanced applications, such as IA64 and static RAMs.
F
EATURES
9 HSTL outputs
Selectable differential CLK, nCLK or LVPECL clock inputs
CLK, nCLK pair can accept the following differential input
levels: LVPECL, LVDS, HSTL, SSTL, HCSL
PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
Maximum output frequency: 500MHz
Output skew: 50ps (maximum)
Part-to-part skew: 250ps (maximum)
Propagation delay: 1.8ns (maximum)
V
OH
= 1.4V (maximum)
3.3V core, 1.8V output operating supply voltages
0°C to 70°C ambient operating temperature
Industrial temperature information available upon request
B
LOCK
D
IAGRAM
CLK_EN
CLK
nCLK
PCLK
nPCLK
CLK_SEL
D
Q
LE
0
1
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
Q7
nQ7
Q8
nQ8
P
IN
A
SSIGNMENT
V
DDO
nQ2
Q2
nQ1
Q1
nQ0
Q0
V
DDO
32 31 30 29 28 27 26 25
V
DD
CLK
nCLK
CLK_SEL
PCLK
nPCLK
GND
CLK_EN
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
V
DDO
Q3
nQ3
Q4
nQ4
Q5
nQ5
V
DDO
ICS8521
9 1 0 1 1 1 2 1 3 1 4 1 5 16
V
DDO
Q6
nQ6
Q7
nQ7
Q8
nQ8
V
DDO
32-Lead LQFP
7mm x 7mm x 1.4mm Package Body
Y Package
Top View
8521BY
www.idt.com
1
REV. E JULY 25, 2010

8521BY Related Products

8521BY 8521BYT
Description Low Skew Clock Driver, 8521 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32 Low Skew Clock Driver, 8521 Series, 9 True Output(s), 0 Inverted Output(s), PQFP32, 7 X 7 MM, 1.40 MM HEIGHT, MS-026BBA, LQFP-32
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Parts packaging code QFP QFP
package instruction LQFP, QFP32,.35SQ,32 LQFP, QFP32,.35SQ,32
Contacts 32 32
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
series 8521 8521
Input adjustment DIFFERENTIAL MUX DIFFERENTIAL MUX
JESD-30 code S-PQFP-G32 S-PQFP-G32
JESD-609 code e0 e0
length 7 mm 7 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
Humidity sensitivity level 3 3
Number of functions 1 1
Number of terminals 32 32
Actual output times 9 9
Maximum operating temperature 70 °C 70 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code LQFP LQFP
Encapsulate equivalent code QFP32,.35SQ,32 QFP32,.35SQ,32
Package shape SQUARE SQUARE
Package form FLATPACK, LOW PROFILE FLATPACK, LOW PROFILE
Peak Reflow Temperature (Celsius) 240 240
power supply 1.8,3.3 V 1.8,3.3 V
Prop。Delay @ Nom-Sup 1.8 ns 1.8 ns
propagation delay (tpd) 1.8 ns 1.8 ns
Certification status Not Qualified Not Qualified
Same Edge Skew-Max(tskwd) 0.05 ns 0.05 ns
Maximum seat height 1.6 mm 1.6 mm
Maximum supply voltage (Vsup) 3.465 V 3.465 V
Minimum supply voltage (Vsup) 3.135 V 3.135 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
Temperature level COMMERCIAL COMMERCIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.8 mm 0.8 mm
Terminal location QUAD QUAD
Maximum time at peak reflow temperature 20 20
width 7 mm 7 mm
minfmax 500 MHz 500 MHz
Base Number Matches 1 1
I want to ask if this schematic tool comes from Mars?
Original post here: [url=https://bbs.eeworld.com.cn/thread-361279-1-2.html]https://bbs.eeworld.com.cn/thread-361279-1-2.html[/url] I started to learn audio by playing around with it. Magazines were fu...
osoon2008 PCB Design
How to solve the problem of GPRS modem in the IPCP stage after dialing
What is the frame after GPRS IPCP negotiation? GPRS side: 7E 80 21 01 07 00 16 03 06 00 00 00 00 81 06 00 00 00 00 83 06 00 00 00 00 66 F8 7E GGSN side: 7E 80 21 03 07 00 16 03 06 [0A 44 C5 37] 81 06 ...
AVR_AFA Embedded System
EEWORLD University Hall--Introduction to Digital Filter Design
Introduction to Digital Filter Design : https://training.eeworld.com.cn/course/4782Users will be introduced how to use Kesight SystemVeu for digital filter design and how to convert floating-point FIR...
量子阱 Analog electronics
Isolation method of converter interface and peripheral circuit introduction
[p=30, null, left][color=rgb(34, 34, 34)][font="][size=4]Since the output of the digital-to-analog converter is directly connected to the controlled object, it is easy to introduce interference throug...
Aguilera Analogue and Mixed Signal
msp430f149 baud rate setting
[size=4] TI MSP430 series microcontroller, the baud rate value of the usart module is determined by the following three registers: UxBR0, UxBR1, UxMCTL [/size] [size=4] Baud rate = BRCLK/N, mainly to ...
Aguilera Microcontroller MCU
The scrolling text and video ads cannot be played under wince!
The situation is as follows: A form is made under Wince4.2, and different functions are implemented under different sub-controls. Video ads have been played on one control. Now, scrolling text ads are...
huzhiming Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1476  1959  2365  1858  317  30  40  48  38  7 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号