The Fujitsu MB15E03 is serial input Phase Locked Loop (PLL) frequency synthesizer with a 1.2 GHz prescaler. A
64/65 or a 128/129 can be selected for the prescaler that enables pulse swallow operation.
The latest BiCMOS process technology is used, resuItantly a supply current is limited as low as 3.5 mA typ. This
operates with a supply voltage of 3.0 V (typ.).
Furthermore, a super charger circuit is included to get a fast tuning as well as low noise performance. As a result of
this, MB15E03 is ideally suitable for digital mobile communications, such as GSM (Global System for Mobile
Communications).
s
FEATURES
•
•
•
•
•
•
•
High frequency operation: 1.2 GHz max
Low power supply voltage: V
CC
= 2.7 to 3.6 V
Very Low power supply current : I
CC
= 3.5 mA typ. (V
CC
= 3 V)
Power saving function : I
PS
= 0.1
µ
A typ.
Pulse swallow function: 64/65 or 128/129
Serial input 14-bit programmable reference divider: R = 5 to 16,383
Serial input 18-bit programmable divider consisting of:
- Binary 7-bit swallow counter: 0 to 127
- Binary 11-bit programmable counter: 5 to 2,047
• Wide operating temperature: Ta = –40 to 85
°
C
• Plastic 16-pin SSOP package (FPT-16P-M05)
s
PACKAGE
16-pin, Plastic SSOP
(FPT-16P-M05)
This device contains circuitry to protect the inputs against damage due to high static voltages or electroc fields. However, it is advised that normal precautions
be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit.
1
MB15E03
s
PIN ASSIGNMENT
OSCin
OSCout
Vp
Vcc
Do
GND
Xfin
fin
1
2
3
4
16
15
14
φ
R
φ
P
LD/fout
ZC
PS
LE
Data
Clock
TOP 13
VIEW
5
12
6
7
8
11
10
9
2
MB15E03
s
PIN DESCRIPTIONS
Pin no.
1
Pin name
OSC
IN
I/O
I
Descriptions
Programmable reference divider input.
Oscillator input.
Connection for an crystal or a TCXO.
TCXO should be connected with a coupling capacitor.
Oscillator output.
Connection for an external crystal.
Power supply voltage input for the charge pump.
Power supply voltage input.
Charge pump output.
Phase of the charge pump can be reversed by FC bit.
Ground.
Prescaler complementary input, and should be grounded via a capacitor.
Prescaler input.
Connection with an external VCO should be done with AC coupling.
Clock input for the 19-bit shift register.
Data is shifted into the shift register on the rising edge of the clock.
(Open
is prohibited.)
Serial data input using binary code.
The last bit of the data is a control bit.
(Open is prohibited.)
Control bit = ”H” ; Data is transmitted to the programmable reference
counter.
Control bit = ”L” ; Data is transmitted to the programmable counter.
Load enable signal input
(Open is prohibited.)
When LE is high, the data in the shift register is transferred to a latch,
according to the control bit in the serial data.
Power saving mode control. This pin must be set at ”L” at Power-ON.
(Open is prohibited.)
PS = ”H” ; Normal mode
PS = ”L” ; Power saving mode
Forced high-impedance control for the charge pump (with internal pull up
resistor.)
ZC = ”H” ; Normal Do output.
ZC = ”L” ; Do becomes high impedance.
Lock detect signal output(LD)/phase comparator monitoring
output (fout).
The output signal is selected by LDS bit in the serial data.
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