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C0805Z629CBGAH

Description
Ceramic Capacitor, Multilayer, Ceramic, 50V, 4.03% +Tol, 4.03% -Tol, BP, 30ppm/Cel TC, 0.0000062uF, Surface Mount, 0805, CHIP
CategoryPassive components    capacitor   
File Size170KB,4 Pages
ManufacturerKEMET
Websitehttp://www.kemet.com
Download Datasheet Parametric View All

C0805Z629CBGAH Overview

Ceramic Capacitor, Multilayer, Ceramic, 50V, 4.03% +Tol, 4.03% -Tol, BP, 30ppm/Cel TC, 0.0000062uF, Surface Mount, 0805, CHIP

C0805Z629CBGAH Parametric

Parameter NameAttribute value
package instruction, 0805
Reach Compliance Codecompliant
ECCN codeEAR99
capacitance0.0000062 µF
Capacitor typeCERAMIC CAPACITOR
dielectric materialsCERAMIC
JESD-609 codee0
Manufacturer's serial numberC
Installation featuresSURFACE MOUNT
multi-layerYes
negative tolerance4.03%
Number of terminals2
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package shapeRECTANGULAR PACKAGE
method of packingTRAY
positive tolerance4.03%
Rated (DC) voltage (URdc)50 V
size code0805
surface mountYES
Temperature characteristic codeBP
Temperature Coefficient30ppm/Cel ppm/°C
Terminal surfaceTIN LEAD
Terminal shapeWRAPAROUND
Base Number Matches1
CERAMIC HIGH RELIABILITY MOLDED & CHIPS
GENERAL INFORMATION MIL-PRF-123
INTRODUCTION
MIL-PRF-123 specification covers the general requirements for high
reliability, general purpose (BX) and temperature stable (BP) ceramic
dielectric fixed capacitors for space, missile, and other high reliability
applications. Capacitors covered by MIL-PRF-123 may be used in
critical frequency determining applications, timing circuits, and other
applications where absolute stability is required (BP) and in applica-
tions where appreciable variations in capacitance with respect to
temperature, voltage, frequency, and life can be tolerated (BX).
10.
Radiographic Inspection
(leaded devices only) (100% of lot).
11.
Visual Inspection
per MIL-PRF-123 criteria.
12.
Destructive Physical Analysis
per EIA-469 and MIL-PRF-123.
SAMPLE TESTS
The following Group B tests shall be performed on samples from
each lot, which have been subjected to and have passed Group A
inspection.
1.
Thermal Shock—Performed
in accordance to MIL-STD-202,
Method 107, Condition A, with step 3 being 125°C. Number of
cycles shall be 100.
2.
Life Test per MIL-5TD-202, Method 108.
Test temperature and
tolerance is +125°C +4, -0°C. Capacitors shall be subjected to
2X rated voltage for 1000 hours.
3.
Humidity, steady state, low voltage per MIL-STD-202,
Method 103, Condition A.
Capacitors shall be subjected to an
environment of 85°C with 85% relative humidity for 240 hours
minimum. Cycling shall not be performed. A dc potential of 1.3
±0.25 volts shall be applied continuously through a 100,000
ohm resistance to each device under test. At completion, 25°C
IR and Cap are read.
4.
Voltage-temperature limits—Capacitance
is measured at var-
ious temperatures (-55°C to +125°C) with and without rated
voltage.
5.
Moisture Resistance per MIL-STD-202, Method 106.
There
shall be 20 continuous cycles. During the first 10 cycles only, a
dc potential of 50 volts shall be applied across the capacitor ter-
minals. Once each day, a check shall be performed to deter-
mine whether a capacitor has shorted. Vibration cycle of MIL-
STD-202, Method 106, Step 7b shall not be performed. Upon
completion of MIL-STD-202, Method 106, Step 6 of the final
cycle, capacitors shall be measured for capacitance, dielectric
withstanding voltage and insulation resistance.
The following Group C tests shall be performed on samples selected
from lots that have passed Group A and have been submitted for
Group B inspection. Samples shall be selected every two months.
1. Terminal Strength
2. Solderability
3. Resistance to Soldering Heat
4. Solvent Resistance (Leaded devices only)
All lots shipped must have been subjected to and passed Group A
and B testing.
SCREENING TESTS
Each lot has the following In-Process Inspections performed:
1. 100% C-SAM (C-Mode Surface Acoustical Microscopy)
2. In-Process Destructive Physical Analysis
3. 100% visual inspection at a minimum of 10X magnification
4. Pre-encapsulation terminal strength evaluation (leaded devices
only). Radial leaded capacitors must meet a minimum lead pull
of 1.8 kg (4.0 lbs.).
The following Group A shall be performed on each lot:
1.
Thermal Shock—Performed
in accordance to MIL-STD-202,
Method 107, Condition A, with step 3 being 125°C. Number of
cycles shall be 20 (100% of lot).
2.
Voltage Conditioning—The
voltage conditioning shall consist
of applying twice the rated voltage to the units at the maximum
rated temperature of 125°C for a minimum of 168 hours and a
maximum of 264 hours. The voltage conditioning may be termi-
nated at any time during 168 hours to 264 hours time interval
that confirmed failures meet the requirements for the PDA dur-
ing the last 48 hours listed in Table I below (100% of lot).
Optional Voltage Conditioning (Accelerated Voltage
Conditioning)—AII
conditions of the standard voltage condi-
tioning apply with the exception of the increased voltage and the
decreased test time. (Refer to Mil-PRF-123 for formula.)
*Step 5
is performed on chips at this point (100% of lot).
3.
Dielectric Withstanding Voltage
250% of the dc rated voltage
at 25°C (100% of lot).
4.
Insulation Resistance—The
25°C measurement with rated
voltage applied shall be the lesser of 100 GΩ or 1000 megohm-
microfarads (100% of lot).
*5.Insulation
Resistance—The
125°C measurement with rated
voltage applied shall be the lesser of 10 GΩ or 100 megohm-
microfarads (1000% of lot). For chips 125°C IR is performed
prior to step 3 above.
6.
Storage
at 150°C for 2 hours minimum without voltage applied
followed by a 12-hour minimum stabilization period (tempera-
ture characteristic BX only).
7.
Capacitance
must be within specified tolerance at 25°C (100%
of lot).
Cap Exclusion:
Capacitance values no more than 5% or
.5 pF, whichever is greater, for BX characteristics or 1% or .3 pF,
whichever is greater, for BP characteristics beyond specified tol-
erance limit shall be removed from the lot but shall not be con-
sidered defective for determination of the PDA.
8.
Dissipation Factor
shall not exceed 2.5% for X dielectric,
0.15% for G dielectric at 25°C (100% of lot).
9.
Percent Defective Allowable (PDA).
The following table lists
the PDA requirements for MIL-PRF-123 Group A:
TABLE I
BURN IN PDA
LAST 48 HOURS
1 unit or 0.1%
1 unit or 0.2%
1 unit or 0.2%
1 unit or 0.1%
1 unit or 0.1%
1 unit or 0.1%
1 unit or 0.1%
1 unit or 0.1%
1 unit or 0.1%
1 unit or 0.1%
STANDARD PACKAGING FOR
MIL-PRF-123 IS AS FOLLOWS:
C052Z
C062Z
C512Z
tray
tray
1 pc. per bag
C0805Z
C1206Z
C1210Z
C1808Z
C1812Z
C1825Z
C2225Z
chip
chip
chip
chip
chip
chip
chip
tray
tray
tray
tray
tray
tray
tray
DATA PACKAGE
A data package is sent with each shipment which contains:
1. Summary of Group A testing
2. Summary of Group B testing
3. Group B Variables Test Data
4. Lead Pull Data (Leaded Devices Only)
5. Final Destructive Physical Analysis Report
6. Certificate of Compliance stating that the ceramic capacitors
supplied meet all the requirements of MIL-PRF-123, the applic-
able slash sheet(s) and all associated documents.
KEMET
STYLE
C052Z
C062Z
C512Z
C0805Z
C1210Z
C1808Z
C2225Z
C1206Z
C1812Z
C1825Z
MIL
STYLE
CKS05
CKS06
CKS07
CKS51
CKS52
CKS53
CKS54
CKS55
CKS56
CKS57
PDA
OVERALL
3%
5%
5%
3%
3%
3%
3%
3%
3%
3%
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
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