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74LS112F

Description
J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16
Categorylogic    logic   
File Size87KB,3 Pages
ManufacturerSignetics
Download Datasheet Parametric View All

74LS112F Overview

J-K Flip-Flop, LS Series, 2-Func, Negative Edge Triggered, 2-Bit, Complementary Output, TTL, CDIP16, CERAMIC, DIP-16

74LS112F Parametric

Parameter NameAttribute value
package instructionDIP,
Reach Compliance Codeunknown
seriesLS
JESD-30 codeR-GDIP-T16
Load capacitance (CL)15 pF
Logic integrated circuit typeJ-K FLIP-FLOP
Number of digits2
Number of functions2
Number of terminals16
Maximum operating temperature70 °C
Minimum operating temperature
Output polarityCOMPLEMENTARY
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Package shapeRECTANGULAR
Package formIN-LINE
Maximum supply current (ICC)8 mA
propagation delay (tpd)30 ns
Certification statusNot Qualified
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyTTL
Temperature levelCOMMERCIAL
Terminal formTHROUGH-HOLE
Terminal locationDUAL
Trigger typeNEGATIVE EDGE
minfmax30 MHz
Base Number Matches1
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