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843001AG-22T

Description
PLL/Frequency Synthesis Circuit
CategoryAnalog mixed-signal IC    The signal circuit   
File Size182KB,11 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

843001AG-22T Overview

PLL/Frequency Synthesis Circuit

843001AG-22T Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Reach Compliance Codeunknown
Base Number Matches1
PRELIMINARY
Integrated
Circuit
Systems, Inc.
ICS843001-22
F
EMTO
C
LOCKS
™C
RYSTAL
-
TO
-
3.3V LVPECL F
REQUENCY
S
YNTHESIZER
F
EATURES
• One 3.3V LVPECL output pair and one LVCMOS output
• Selectable crystal oscillator interface
or LVCMOS/LVTTL single-ended input
• VCO range: 490MHz - 640MHz
• Output frequency range: 490MHz - 640MHz
• Supports the following applications:
SONET, Ethernet, Fibre Channel, Serial ATA, and HDTV
• RMS phase jitter @ 622.08MHz (12kHz - 20MHz):
0.79ps (typical) design target
• Full 3.3V supply mode
• 0°C to 70°C ambient operating temperature
G
ENERAL
D
ESCRIPTION
The ICS843001-22 is a a highly versatile, low
phase noise LVPECL Synthesizer which can
HiPerClockS™
generate low jitter reference clocks for a variety of
communications applications and is a member of
the HiPerClocks
TM
family of high performance clock
solutions from ICS. The dual crystal interface allows
the synthesizer to support up to two communications standards
in a given application (i.e. 1GB Ethernet with a 25MHz crystal
and 1Gb Fibre Channel using a 25.5625MHz crystal). The rms
phase jitter performance is typically less than 1ps, thus making
the device acceptable for use in demanding applications such
as OC48 SONET and 10Gb Ethernet. The ICS843001-22 is
packaged in a small 24-pin TSSOP package.
ICS
C
ONTROL
I
NPUT
F
UNCTION
T
ABLE
Control Input
OE
0
1
FLOAT
Q0/nQ0
High-Z
Active
High-Z
Outputs
REF_CLK
High-Z
High-Z
Active
P
IN
A
SSIGNMENT
V
CCO
_
CMOS
N0
N1
N2
V
CCO
_
PECL
Q0
nQ0
V
EE
V
CCA
V
CC
XTAL_OUT1
XTAL_IN1
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
REF_CLK
V
EE
OE
M2
M1
M0
MR
SEL1
SEL0
TEST_CLK
XTAL_IN0
XTAL_OUT0
B
LOCK
D
IAGRAM
3
N2:N0
SEL0
Pulldown
SEL1
Pulldown
ICS843001-22
N
000
001
010
011
÷1
÷2
÷3
÷4
(default)
÷5
÷6
÷8
÷10
XTAL_IN0
OSC
XTAL_OUT0
00
11
24-Lead TSSOP
4.40mm x 7.8mm x 0.92mm
package body
G Package
Top View
Q0
nQO
XTAL_IN1
OSC
XTAL_OUT1
TEST_CLK
Pulldown
01
Phase
Detector
VCO
490MHz -640MHz
10
01
00
100
101
110
111
10
000
001
010
011
100
101
M
÷18
÷22
÷24
÷25
÷32
(default)
÷40
MR
M2:M0
Pulldown
3
REF_CLK
OE
Pullup/Pulldown
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
843001AG-22
www.icst.com/products/hiperclocks.html
REV. A JUNE 17, 2005
1

843001AG-22T Related Products

843001AG-22T ICS843001AG-22LF ICS843001AG-22LFT ICS843001AG-22T ICS843001AG-22
Description PLL/Frequency Synthesis Circuit Clock Generator, 640MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24 Clock Generator, 640MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24 Clock Generator, 640MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24 Clock Generator, 640MHz, PDSO24, 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24
Is it Rohs certified? incompatible conform to conform to incompatible incompatible
Reach Compliance Code unknown compliant compliant not_compliant not_compliant
Base Number Matches 1 1 1 1 1
Is it lead-free? - Lead free Lead free Contains lead Contains lead
Parts packaging code - TSSOP TSSOP TSSOP TSSOP
package instruction - 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24 4.40 X 7.80 MM, 0.92 MM HEIGHT, MO-153, TSSOP-24 TSSOP, TSSOP,
Contacts - 24 24 24 24
ECCN code - EAR99 EAR99 EAR99 EAR99
JESD-30 code - R-PDSO-G24 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24
JESD-609 code - e3 e3 e0 e0
length - 7.8 mm 7.8 mm 7.8 mm 7.8 mm
Number of terminals - 24 24 24 24
Maximum operating temperature - 70 °C 70 °C 70 °C 70 °C
Maximum output clock frequency - 640 MHz 640 MHz 640 MHz 640 MHz
Package body material - PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code - TSSOP TSSOP TSSOP TSSOP
Package shape - RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) - 260 260 240 240
Master clock/crystal nominal frequency - 40 MHz 40 MHz 40 MHz 40 MHz
Certification status - Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height - 1.2 mm 1.2 mm 1.2 mm 1.2 mm
Maximum supply voltage - 3.63 V 3.63 V 3.63 V 3.63 V
Minimum supply voltage - 2.97 V 2.97 V 2.97 V 2.97 V
Nominal supply voltage - 3.3 V 3.3 V 3.3 V 3.3 V
surface mount - YES YES YES YES
technology - CMOS CMOS CMOS CMOS
Temperature level - COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal surface - MATTE TIN MATTE TIN TIN LEAD Tin/Lead (Sn/Pb)
Terminal form - GULL WING GULL WING GULL WING GULL WING
Terminal pitch - 0.65 mm 0.65 mm 0.65 mm 0.65 mm
Terminal location - DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature - 30 30 30 30
width - 4.4 mm 4.4 mm 4.4 mm 4.4 mm
uPs/uCs/peripheral integrated circuit type - CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
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