ADC14DC105CISQE datasheet, PDF

ADC14DC105CISQE: DescriptionPROPRIETARY METHOD ADC, QCC60, 9 X 9 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, LLP-60; CategoryAnalog mixed-signal IC converter; File Size1MB，27 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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ADC14DC105CISQE Overview

PROPRIETARY METHOD ADC, QCC60, 9 X 9 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, LLP-60

Parameter Name	Attribute value
Parts packaging code	QFN
package instruction	HVQCCN,
Contacts	60
Reach Compliance Code	unknown
ECCN code	3A991.C.3
Maximum analog input voltage	1.6 V
Minimum analog input voltage	1.4 V
Maximum conversion time	0.0095 µs
Converter type	ADC, PROPRIETARY METHOD
JESD-30 code	S-XQCC-N60
length	9 mm
Maximum linear error (EL)	0.0244%
Number of analog input channels	2
Number of digits	14
Number of functions	1
Number of terminals	60
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output bit code	OFFSET BINARY, 2'S COMPLEMENT BINARY
Output format	PARALLEL, WORD
Package body material	UNSPECIFIED
encapsulated code	HVQCCN
Package shape	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Sampling rate	105 MHz
Sample and hold/Track and hold	SAMPLE
Maximum seat height	0.8 mm
Nominal supply voltage	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	QUAD
width	9 mm
Base Number Matches	1

	ADC14DC105CISQE	ADC14DC105CISQ
Description	PROPRIETARY METHOD ADC, QCC60, 9 X 9 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, LLP-60	PROPRIETARY METHOD ADC, QCC60, 9 X 9 MM, 0.80 MM HEIGHT, 0.50 MM PITCH, LLP-60
Parts packaging code	QFN	QFN
package instruction	HVQCCN,	HVQCCN, LCC60,.35SQ,20
Contacts	60	60
Reach Compliance Code	unknown	not_compliant
ECCN code	3A991.C.3	3A991.C.3
Maximum analog input voltage	1.6 V	1.6 V
Minimum analog input voltage	1.4 V	1.4 V
Maximum conversion time	0.0095 µs	0.0095 µs
Converter type	ADC, PROPRIETARY METHOD	ADC, PROPRIETARY METHOD
JESD-30 code	S-XQCC-N60	S-XQCC-N60
length	9 mm	9 mm
Maximum linear error (EL)	0.0244%	0.0244%
Number of analog input channels	2	2
Number of digits	14	14
Number of functions	1	1
Number of terminals	60	60
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output bit code	OFFSET BINARY, 2'S COMPLEMENT BINARY	OFFSET BINARY, 2'S COMPLEMENT BINARY
Output format	PARALLEL, WORD	PARALLEL, WORD
Package body material	UNSPECIFIED	UNSPECIFIED
encapsulated code	HVQCCN	HVQCCN
Package shape	SQUARE	SQUARE
Package form	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Sampling rate	105 MHz	105 MHz
Sample and hold/Track and hold	SAMPLE	SAMPLE
Maximum seat height	0.8 mm	0.8 mm
Nominal supply voltage	3.3 V	3.3 V
surface mount	YES	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	NO LEAD	NO LEAD
Terminal pitch	0.5 mm	0.5 mm
Terminal location	QUAD	QUAD
width	9 mm	9 mm
Base Number Matches	1	1

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

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