ACS253MS
November 1997
Radiation Hardened
Dual 4-Input Multiplexer with Three-State Outputs
Description
The Radiation Hardened ACS253MS is a Dual 4-Channel Mul-
tiplexer having two common binary control inputs for selecting 1
of 4 data channels. All inputs and outputs are buffered and are
designed for balanced propagation delay and transition times.
Separate Output Enable inputs are provided to ease system
design. When OE1 or OE2 are set HIGH, the corresponding
output is configured into a high impedance state.
The ACS253MS is fabricated on a CMOS Silicon on Sapphire
(SOS) process, which provides an immunity to Single Event
Latch-up and the capability of highly reliable performance in
any radiation environment. These devices offer significant
power reduction and faster performance when compared to
ALSTTL types.
Specifications for Rad Hard QML devices are controlled
by the Defense Supply Center in Columbus (DSCC). The
SMD numbers listed below must be used when ordering.
Detailed Electrical Specifications for the ACS253 are
contained in SMD 5962-98007. A “hot-link” is provided
on our homepage with instructions for downloading.
http://www.intersil.com/data/sm/index.htm
Features
• QML Qualified Per MIL-PRF-38535 Requirements
• 1.25Micron Radiation Hardened SOS CMOS
• Radiation Environment
- Latch-up Free Under any Conditions
- Total Dose . . . . . . . . . . . . . . . . . . . . . . 3 x 10
5
RAD(Si)
- SEU Immunity . . . . . . . . . . . <1 x 10
-10
Errors/Bit/Day
- SEU LET Threshold . . . . . . . . . . . >100MeV/(mg/cm
2
)
• Input Logic Levels . . .V
IL
= (0.3)(V
CC
), V
IH
= (0.7)(V
CC
)
• Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±8mA
• Quiescent Supply Current. . . . . . . . . . . . . . . . . . . 400µs
• Propagation Delay
- Enable to Output . . . . . . . . . . . . . . . . . . . . . . . . . 12ns
- Input or Address to Output . . . . . . . . . . . . . . . . . 15ns
Applications
• Digital Channel Selection
• Data Routing
• High Frequency Switching
Ordering Information
SMD PART NUMBER
5962F9800701VEC
N/A
5962F9800701VXC
N/A
N/A
INTERSIL PART NUMBER
ACS253DMSR-02
ACS253D/Sample-02
ACS253KMSR-02
ACS253K/Sample-02
ACS253HMSR-02
TEMP. RANGE (
o
C)
-55 to 125
25
-55 to 125
25
25
PACKAGE
16 Ld SBDIP
16 Ld SBDIP
16 Ld Flatpack
16 Ld Flatpack
Die
CASE OUTLINE
CDIP2-T16
CDIP2-T16
CDFP4-F16
CDFP4-F16
N/A
Pinouts
ACS253 (SBDIP)
TOP VIEW
1OE 1
S
1
2
1I
3
3
1I
2
4
1I
1
5
1I
0
6
1Y 7
GND 8
16 V
CC
15 2OE
14 S
0
13 2I
3
12 2I
2
11 2I
1
10 2I
0
9 2Y
ACS253 (FLATPACK)
TOP VIEW
1OE
S
1
1I
3
1I
2
1I
1
1I
0
1Y
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
V
CC
2OE
S
0
2I
3
2I
2
2I
1
2I
0
2Y
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
File Number
4428
1
ACS253MS
Die Characteristics
DIE DIMENSIONS:
Size: 2390µm x 2390µm (94 mils x 94 mils)
Thickness: 525µm
±25µm
(20.6 mils
±1
mil)
Bond Pad: 110µm x 110µm (4.3 mils x 4.3 mils)
METALLIZATION:
Type: Al
Metal 1 Thickness: 0.7µm
±0.1µm
Metal 2 Thickness: 1.0µm
±0.1µm
SUBSTRATE
Silicon on Sapphire (SOS)
SUBSTRATE POTENTIAL:
Unbiased Insulator
BACKSIDE FINISH:
Sapphire
PASSIVATION:
Type: Phosphorous Silicon Glass (PSG)
Thickness: 1.30µm
±0.15µm
SPECIAL INSTRUCTIONS:
Bond V
CC
First
ADDITIONAL INFORMATION:
Worst Case Density: <2.0 x 10
5
A/cm
2
Transistor Count: 140
Metallization Mask Layout
ACS253MS
S1
10E
V
CC
20E
1I
3
S
0
1I
2
2I
3
1I
1
2I
2
1T
0
2I
1
1Y
GND
2Y
2I
0
All Intersil semiconductor products are manufactured, assembled and tested under
ISO9000
quality systems certification.
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate
and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which
may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site
http://www.intersil.com
2
京公网安备 11010802033920号
EEWORLD
