RAD Tolerant
ACT–RS128K32 High Speed
4 Megabit SRAM Multichip Module
Features
s
Overall configuration as 128K x 32
s
Tolerant to 30KRad (Si)
s
Latch-up Immunity to 112MeV/(mg/cm
2
)
s
Input and Output TTL Compatible
s
35 & 45ns Access Times
s
Full Military (-55°C to +125°C) Temperature Range
s
For Class K devices per MIL-PRF-38534 - Consult Factory
s
+5V Power Supply
s
Choice of 4 Hermetically sealed Co-fired Packages:
q
68–Lead, Low Profile CQFP (F1), 1.56"SQ x .140"max
q
68–Lead, Dual-Cavity CQFP (F2), .88"SQ x .20"max (.18"max thickness
available, contact factory for details)
(Drops into the 68 Lead JEDEC .99"SQ
CQFJ footprint)
q
66–Lead, PGA-Type (P1), 1.385"SQ x .245"max
s
Internal Decoupling Capacitors
www.aeroflex.com/act1.htm
Preliminary
s
4 Low Power CMOS 128K x 8 SRAMs in one MCM
CIRCUIT TECHNOLOGY
General Description
The ACT–RS128K32 is a High
Speed 4 megabit CMOS SRAM
Multichip
Module
(MCM)
designed for full temperature
range, military, space, or high
reliability mass memory and
fast cache applications.
The MCM can be organized
as a 128K x 32 bits, 256K x 16
bits or 512k x 8 bits device and
is input and output TTL
compatible. Writing is executed
when the write enable (WE)
and chip enable (CE) inputs are
low. Reading is accomplished
when WE is high and CE and
output enable (OE) are both
low. Access time grades of
35ns and 45ns maximum are
standard.
The +5 Volt power supply
version is standard.
The products are designed for
operation over the temperature
range of -55°C to +125°C and
screened under the full military
environment. DESC Standard
Military Drawing (SMD) part
numbers are pending.
The
ACT-RS128K32
is
manufactured in Aeroflex’s
80,000ft
2
MIL-PRF-38534
certified facility in Plainview,
N.Y.
Block Diagram – PGA Type Package(P1) & CQFP(F2)
Pin Description
WE
1
CE
1
WE
2
CE
2
WE
3
CE
3
WE
4
CE
4
I/O
0-31
A
0
– A
16
OE
128Kx8
128Kx8
128Kx8
128Kx8
A
0–16
WE
1–4
CE
1–4
OE
V
cc
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
GND
NC
Data I/O
Address Inputs
Write Enables
Chip Enables
Output Enable
Power Supply
Ground
Not Connected
Block Diagram – CQFP(F1)
Pin Description
CE
1
WE
OE
A
0
– A
16
128Kx8
128Kx8
128Kx8
128Kx8
CE
2
CE
3
CE
4
I/O
0-31
A
0–16
WE
CE
1–4
OE
V
cc
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
GND
NC
Data I/O
Address Inputs
Write Enable
Chip Enables
Output Enable
Power Supply
Ground
Not Connected
eroflex Circuit Technology - Advanced Multichip Modules © SCD3659 REV 3 12/17/98
Absolute Maximum Ratings
Symbol
T
C
T
STG
P
D
Storage Temperature
Maximum Package Power Dissipation
F1 & P1 Packages
F2 Package
Ø
J-C
Hottest Die, Max Thermal Resistance - Junction to Case
F1 & P1 Packages
F2 Package
V
G
T
L
Maximum Signal Voltage to Ground
Maximum Lead Temperature (10 seconds)
2.0
8.0
-0.5 to +7
300
°C/W
°C/W
V
°C
4.4
3.3
W
W
Rating
Case Operating Temperature
Range
-55 to +125
-65 to +150
Units
°C
°C
Normal Operating Conditions
Symbol
V
CC
V
IH
V
IL
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Minimum
+4.5
+2.2
-0.5
Maximum
+5.5
V
CC
+ 0.3
+0.8
Units
V
V
V
Truth Table
Mode
Standby
Read
Read
Write
CE
H
L
L
L
OE
X
L
H
X
WE
X
H
H
L
Data I/O
High Z
Data Out
High Z
Data In
Power
Standby (deselect/power down)
Active
Active (deselected)
Active
Capacitance
(
f = 1MHz, T
C
= 25°C
)
Symbol Parameter
C
AD
C
OE
C
WE
C
CE
C
I
/
O
A
0
–
A
16
Capacitance
OE Capacitance
CQFP(F1) Package
PGA(P1) and CQFP(F2) Packages
Chip Enable Capacitance
I/O
0
– I/O
31
Capacitance
Maximum
50
50
50
20
20
20
Units
pF
pF
pF
pF
pF
pF
Capacitance is guaranteed by design but not tested.
(4.5Vdc< V
CC
< 5.5Vdc, V
SS
= 0V, T
C
= -55°C to +125°C, Unless otherwise specified)
Parameter
Input Leakage Current
Output Leakage Current
Sym
I
LI
I
LO
Conditions
V
CC
= Max,
V
IN
= 0 or V
CC
CE = V
IH
, OE = V
IH
,
V
OUT
= 0 or V
CC
–035
Min Max
10
10
–045
Min Max
10
10
Units
µA
µA
DC Characteristics
Operating Supply Current 32 Bit Mode
Aeroflex Circuit Technology ACT-RS128K32
CE = V
IL
, OE = V
IH
,
I
CC
x32 f = 5 MHz, V
CC
= Max,
CMOS Compatible
2
SCD3659 REV 3
500
600
mA
12/17/98 Plainview NY (516) 694-6700
(4.5Vdc< V
CC
< 5.5Vdc, V
SS
= 0V, T
C
= -55°C to +125°C, Unless otherwise specified)
Parameter
Sym
Conditions
CE = V
IH
, OE = V
IH
,
f = 5 MHz, V
CC
= Max,
CMOS Compatible
I
OL
= 8 mA, V
CC
= Min
I
OH
= -4.0 mA, V
CC
= Min
2.4
–035
Min Max
30
0.4
2.4
–045
Min Max
30
0.4
Units
DC Characteristics (Continued)
Standby Current
Output Low Voltage
Output High Voltage
I
SB
V
OL
V
OH
mA
V
V
(V
CC
= 5.0V, V
SS
= 0V, T
C
= -55°C to +125°C)
Read Cycle
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Chip Enable to Output in Low Z*
Output Enable to Output in Low Z*
Chip Deselect to Output in High Z*
Output Disable to Output in High Z*
* Parameters guaranteed by design but not tested
AC Characteristics
Sym
t
RC
t
AA
t
ACE
t
CLZ
t
OLZ
t
CHZ
t
OHZ
–035
Min Max
35
35
35
3
0
20
10
–045
Min Max
45
45
45
3
0
20
15
Units
ns
ns
ns
ns
ns
ns
ns
Write Cycle
Parameter
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Write to Output in High Z *
Data Hold from Write Time
Address Hold Time
* Parameters guaranteed by design but not tested
Sym
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
WHZ
t
DH
t
AH
–045
–035
Min Max Min Max
35
25
25
18
25
0
10
0
0
0
0
45
35
35
20
35
0
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
Data Retention Electrical Characteristics (Special Order Only)
(T
C
= -55°C to +125°C)
Parameter
V
CC
for Data Retention
Data Retention Current
Sym
V
DR
I
CCDR1
Test Conditions
CE
≥
V
CC
– 0.2V
V
CC
= 3V, 35 & 45ns
All Speeds
Min
Max
2
5.5
4
Units
V
mA
Aeroflex Circuit Technology ACT-RS128K32
3
SCD3659 REV 3
12/17/98 Plainview NY (516) 694-6700
Timing Diagrams
Read Cycle Timing Diagrams
Read Cycle 1 (CE = OE = V
IL
, WE = V
IH
)
t
RC
A
0-16
t
AA
t
OH
D
I/O
Previous Data Valid
Data Valid
CE
t
AS
WE
S
EE
N
OTE
Write Cycle Timing Diagrams
Write Cycle 1 (WE Controlled, OE = V
IL
)
t
WC
A
0-16
t
AW
t
CW
t
AH
t
WP
S
EE
N
OTE
t
OW
t
WHZ
t
DW
Data Valid
t
DH
D
I/O
Read Cycle 2 (WE = V
IH
)
t
RC
A
0-16
t
AA
CE
t
ACE
t
CLZ
S
EE
N
OTE
Write Cycle 2 (CE Controlled, OE = V
IH
)
t
WC
A
0-16
t
AW
t
CHZ
S
EE
N
OTE
t
AH
t
CW
t
AS
CE
OE
t
OE
t
OLZ
S
EE
N
OTE
t
OHZ
S
EE
N
OTE
t
WP
WE
t
DW
D
I/O
Data Valid
t
DH
D
I/O
High Z
Data Valid
UNDEFINED
DON’T CARE
Note: Guaranteed by design, but not tested.
Note: Guaranteed by design, but not tested.
AC Test Circuit
Current Source
I
OL
Parameter
To Device Under Test
C
L
=
50 pF
I
OH
Current Source
V
Z
~ 1.5 V (Bipolar Supply)
Typical
0 – 3.0
5
1.5
50
Units
V
ns
V
pF
Input Pulse Level
Input Rise and Fall
Input and Output Timing Reference Level
Output Lead Capacitance
Notes:
1) V
Z
is programmable from -2V to +7V. 2) I
OL
and I
OH
programmable from 0 to 16 mA. 3) Tester Impedance
Z
O
= 75
Ω. 4)
V
Z
is typically the midpoint of V
OH
and V
OL
. 5) I
OL
and I
OH
are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
Aeroflex Circuit Technology ACT-RS128K32
4
SCD3659 REV 3
12/17/98 Plainview NY (516) 694-6700
Pin Numbers & Functions
66 Pins — PGA-Type
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Function
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
NC
I/O
0
I/O
1
I/O
2
WE
2
CE
2
GND
I/O
11
A
10
A
11
Pin #
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Function
A
12
Vcc
CE
1
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
NC
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
Pin #
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Function
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
V
CC
CE
4
WE
4
I/O
27
A
3
A
4
A
5
Pin #
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
Function
WE
3
CE
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
I/O
20
"P1" — 1.385" SQ PGA Type Package Standard
Side View
Bottom View
1.400 SQ
MAX
1.000
TYP
.600
TYP
Pin 56
.245
MAX
.025
.035
Pin 1
.100
TYP
.020
.016
Pin 66
.145
MIN
1.000
TYP
Pin 11
.100 TYP
All dimensions in inches
Aeroflex Circuit Technology ACT-RS128K32
5
SCD3659 REV 3
12/17/98 Plainview NY (516) 694-6700
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