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X28HC256PM-70

Description
32KX8 EEPROM 5V, 70ns, PDIP28, PLASTIC, DIP-28
Categorystorage    storage   
File Size294KB,14 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
Download Datasheet Parametric View All

X28HC256PM-70 Overview

32KX8 EEPROM 5V, 70ns, PDIP28, PLASTIC, DIP-28

X28HC256PM-70 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Parts packaging codeDIP
package instructionDIP, DIP28,.6
Contacts28
Reach Compliance Codenot_compliant
ECCN code3A001.A.2.C
Maximum access time70 ns
Other features100000 ENDURANCE WRITE CYCLES; 100 YEARS DATA RETENTION
command user interfaceNO
Data pollingYES
Data retention time - minimum100
Durability1000000 Write/Erase Cycles
JESD-30 codeR-PDIP-T28
JESD-609 codee0
length37.4 mm
memory density262144 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize32KX8
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP28,.6
Package shapeRECTANGULAR
Package formIN-LINE
page size128 words
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programming voltage5 V
Certification statusNot Qualified
Maximum seat height6.35 mm
Maximum standby current0.0005 A
Maximum slew rate0.06 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
switch bitYES
width15.24 mm
Maximum write cycle time (tWC)5 ms
Base Number Matches1
®
X28HC256
256K, 32K x 8 Bit
Data Sheet
June 1, 2005
FN8108.0
5 Volt, Byte Alterable EEPROM
FEATURES
• Access time: 70ns
• Simple byte and page write
—Single 5V supply
—No external high voltages or V
PP
control circuits
—Self-timed
—No erase before write
—No complex programming algorithms
—No overerase problem
• Low power CMOS
—Active: 60mA
—Standby: 500µA
• Software data protection
—Protects data against system level inadvertent
writes
• High speed page write capability
• Highly reliable Direct Write
cell
—Endurance: 1,000,000 cycles
—Data retention: 100 years
• Early end of write detection
—DATA polling
—Toggle bit polling
BLOCK DIAGRAM
DESCRIPTION
The X28HC256 is a second generation high perfor-
mance CMOS 32K x 8 EEPROM. It is fabricated with
Intersil’s proprietary, textured poly floating gate tech-
nology, providing a highly reliable 5 Volt only nonvola-
tile memory.
The X28HC256 supports a 128-byte page write opera-
tion, effectively providing a 24µs/byte write cycle, and
enabling the entire memory to be typically rewritten in
less than 0.8 seconds. The X28HC256 also features
DATA Polling and Toggle Bit Polling, two methods of
providing early end of write detection. The X28HC256
also supports the JEDEC standard Software Data Pro-
tection feature for protecting against inadvertent writes
during power-up and power-down.
Endurance for the X28HC256 is specified as a mini-
mum 1,000,000 write cycles per byte and an inherent
data retention of 100 years.
X Buffers
Latches and
Decoder
A
0
–A
14
Address
Inputs
Y Buffers
Latches and
DECODER
256Kbit
EEPROM
Array
I/O Buffers
and Latches
I/O
0
–I/O
7
CE
OE
WE
V
CC
V
SS
Control
Logic and
Timing
Data Inputs/Outputs
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
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