ACT-S512K32V High Speed 3.3Volt
16 Megabit SRAM Multichip Module
Features
4 Low Power CMOS 512K x 8 SRAMs in one MCM
s
Overall configuration as 512K x 32
s
Input and Output TTL Compatible
s
17, 20, 25, 35 & 45ns Access Times, 15ns Available by
Special Order
s
Full Military (-55°C to +125°C) Temperature Range
s
+3.3V Power Supply
s
Choice of Surface Mount or PGA Type Co-fired Packages:
s
www.aeroflex.com/act1.htm
CIRCUIT TECHNOLOGY
General Description
The ACT–S512K32V is a High
Speed 4 megabit CMOS SRAM
Multichip
Module
(MCM)
designed for full temperature
range, 3.3V Power Supply,
military, space, or high reliability
mass memory and fast cache
applications.
The MCM can be organized
as a 512K x 32 bits, 1M x 16
bits or 2M x 8 bits device and is
input
and
output
TTL
compatible. Writing is executed
when the write enable (WE)
and chip enable (CE) inputs are
low. Reading is accomplished
when WE is high and CE and
output enable (OE) are both
low. Access time grades of
17ns, 20ns, 25ns, 35ns and
45ns maximum are standard.
The products are designed for
operation over the temperature
range of -55°C to +125°C and
screened under the full military
environment. DESC Standard
Military Drawing (SMD) part
numbers are pending.
The
ACT-S512K32V
is
manufactured in Aeroflex’s
80,000ft
2
MIL-PRF-38534
certified facility in Plainview,
N.Y.
68–Lead, Dual-Cavity CQFP (F2), .88"SQ x .20"max (.18"max
thickness available, contact factory for details)
(Drops into the
68 Lead JEDEC .99"SQ CQFJ footprint)
q
66–Pin, PGA-Type (P1), 1.38"SQ x .245"max
q
66–Pin, PGA-Type (P7), 1.08"SQ x .185"max
q
Internal Decoupling Capacitors
s
DESC SMD# Pending
s
Block Diagram – PGA Type Package(P1,P7) & CQFP(F2)
WE
1
CE
1
WE
2
CE
2
WE
3
CE
3
WE
4
CE
4
A
0
– A
18
OE
512Kx8
512Kx8
512Kx8
512Kx8
8
I/O
0-7
8
I/O
8-15
8
I/O
16-23
8
I/O
24-31
Pin Description
I/O
0-31
Data I/O
A
0–18
Address Inputs
WE
1–4
CE
1–4
OE
V
cc
GND
NC
Write Enables
Chip Enables
Output Enable
Power Supply
Ground
Not Connected
eroflex Circuit Technology - Advanced Multichip Modules © SCD3360 REV B 12/17/98
Absolute Maximum Ratings
Symbol
T
C
T
STG
P
D
Rating
Case Operating Temperature
Storage Temperature
Maximum Package Power Dissipation
P1,P7 Package
F2 Package
Hottest Die, Max Thermal Resistance - Junction to Case
P1,P7 Package
F2 Package
Maximum Signal Voltage to Ground
Maximum Lead Temperature (10 seconds)
Speed 15ns
Speed 17ns to 45ns
Range
-40 to +85
-55 to +125
-65 to +150
3.0
2.7
2.0
8.0
-0.5 to +4.6
300
Units
°C
°C
°C
W
W
°C/W
°C/W
V
°C
Ø
J-C
V
G
T
L
Normal Operating Conditions
Symbol
V
CC
V
IH
V
IL
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Minimum
+3.0
+2.0
-0.3
Maximum
+3.6
V
CC
+ 0.3
+0.8
Units
V
V
V
Capacitance
(
f = 1MHz, T
C
= 25°C
)
Symbol Parameter
C
AD
C
OE
C
WE
C
CE
C
I
/
O
A
0
–
A
18
Capacitance
OE Capacitance
Write Enable Capacitance
Chip Enable Capacitance
I/O
0
– I/O
31
Capacitance
Maximum
50
50
20
20
20
Units
pF
pF
pF
pF
pF
Capacitance is guaranteed by design but not tested.
(3.0Vdc< V
CC
< 3.6Vdc, V
SS
= 0V, T
C
= -55°C to +125°C, Unless otherwise specified)
Parameter
Input Leakage Current
Output Leakage Current
Sym
I
LI
I
LO
Conditions
V
CC
= Max, V
IN
= 0 or V
CC
CE = V
IH
, OE = V
IH
, V
OUT
= 0 or V
CC
CE = V
IL
, OE = V
IH
, f = 5 MHz, V
CC
= Max,
CMOS Compatible
CE = V
IH
, OE = V
IH
, f = 5 MHz, V
CC
= Max,
CMOS Compatible
ALL Speeds
Units
Min Max
10
10
600
80
750
240
0.4
2.4
µA
µA
mA
mA
mA
mA
V
V
DC Characteristics
Operating Supply Current 32 Bit Mode I
CC1
x32
Standby Current
I
SB1
CE = V
IL
, OE = V
IH
, f = 50 MHz, V
CC
=
Operating Supply Current 32 Bit Mode I
CC2
x32 Max, CMOS Compatible
Standby Current
Output Low Voltage
Output High Voltage
Aeroflex Circuit Technology ACT-S512K32V
I
SB2
V
OL
V
OH
CE = V
CC
, OE = V
IH
, f = 50 MHz, V
CC
=
Max, CMOS Compatible
I
OL
= 8 mA, V
CC
= Min
I
OH
= -4.0 mA, V
CC
= Min
2
SCD3360 REV B 12/17/98 Plainview NY (516) 694-6700
AC Characteristics
(V
CC
= 3.3V, V
SS
= 0V, Tc = -55°C to +125°C)
Read Cycle
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Hold from Address Change
Output Enable to Output Valid
Chip Enable to Output in Low Z *
Output Enable to Output in Low Z *
Chip Deselect to Output in High Z *
Output Disable to Output in High Z *
Sym
t
RC
t
AA
t
ACS
t
OH
t
OE
t
CLZ
t
OLZ
t
CHZ
t
OHZ
3
0
8
8
0
9
3
0
8
8
–020
–017
Min Max Min Max
17
17
17
0
10
3
0
10
10
20
20
20
0
12
3
0
15
15
–025
–035
–045
Min Max Min Max Min Max
25
25
25
0
25
3
0
15
15
35
35
35
0
35
45
45
45
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
* Parameters guaranteed by design but not tested
Write Cycle
Parameter
Write Cycle Time
Chip Enable to End of Write
Address Valid to End of Write
Data Valid to End of Write
Write Pulse Width
Address Setup Time
Output Active from End of Write *
Write to Output in High Z *
Data Hold from Write Time
Address Hold Time
Sym
t
WC
t
CW
t
AW
t
DW
t
WP
t
AS
t
OW
t
WHZ
t
DH
t
AH
0
0
–017
Min Max
17
15
15
12
13
0
0
8
0
1
–020
–025
–035
–045
Min Max Min Max Min Max Min Max
20
15
15
12
13
0
0
11
0
2
25
20
20
15
15
0
0
13
0
2
35
30
30
20
25
0
0
15
0
2
45
35
35
30
35
0
0
15
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
* Parameters guaranteed by design but not tested
Truth Table
Mode
Standby
Read
Read
Write
CE
H
L
L
L
OE
X
L
H
X
WE
X
H
H
L
Data I/O
High Z
Data Out
High Z
Data In
Power
Standby (deselect/power down)
Active
Active (deselected)
Active
Aeroflex Circuit Technology ACT-S512K32V
3
SCD3360 REV B 12/17/98 Plainview NY (516) 694-6700
Timing Diagrams
Read Cycle Timing Diagrams
Read Cycle 1 (CE = OE = V
IL
, WE = V
IH
)
t
RC
A
0-18
t
AA
t
OH
D
I/O
Previous Data Valid
Data Valid
CE
t
AS
WE
S
EE
N
OTE
Write Cycle Timing Diagrams
Write Cycle 1 (WE Controlled, OE = V
IL
)
t
WC
A
0-16
t
AW
t
CW
t
AH
t
WP
S
EE
N
OTE
t
OW
t
WHZ
t
DW
Data Valid
t
DH
D
I/O
Read Cycle 2 (WE = V
IH
)
t
RC
A
0-18
t
AA
CE
t
ACS
t
CLZ
S
EE
N
OTE
Write Cycle 2 (CE Controlled, OE = V
IH
)
t
WC
A
0-18
t
AW
t
CHZ
S
EE
N
OTE
t
AH
t
CW
t
AS
CE
OE
t
WP
t
OE
t
OLZ
S
EE
N
OTE
t
OHZ
S
EE
N
OTE
WE
t
DW
t
DH
D
I/O
High Z
Data Valid
D
I/O
Data Valid
UNDEFINED
DON’T CARE
Note: Guaranteed by design, but not tested.
AC Test Circuit
Current Source
I
OL
Parameter
Input Pulse Level
To Device Under Test
C
L
=
50 pF
I
OH
Current Source
V
Z
~ 1.5 V (Bipolar Supply)
Typical
0 – 3.0
5
1.5
Units
V
ns
V
Input Rise and Fall
Input and Output Timing Reference
Level
Notes:
1) V
Z
is programmable from -2V to +4.6V. 2) I
OL
and I
OH
programmable from 0 to 16 mA. 3) Tester Impedance
Z
O
= 75
Ω. 4)
V
Z
is typically the midpoint of V
OH
and V
OL
. 5) I
OL
and I
OH
are adjusted to simulate a typical resistance
load circuit. 6) ATE Tester includes jig capacitance.
Aeroflex Circuit Technology ACT-S512K32V
4
SCD3360 REV B 12/17/98 Plainview NY (516) 694-6700
Pin Numbers & Functions
66 Pins — PGA-Type
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Function
I/O
8
I/O
9
I/O
10
A
13
A
14
A
15
A
16
A
17
I/O
0
I/O
1
I/O
2
WE
2
CS
2
GND
I/O
11
A
10
A
11
Pin #
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Function
A
12
Vcc
CS
1
NC
I/O
3
I/O
15
I/O
14
I/O
13
I/O
12
OE
A
18
WE
1
I/O
7
I/O
6
I/O
5
I/O
4
I/O
24
Pin #
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Function
I/O
25
I/O
26
A
6
A
7
NC
A
8
A
9
I/O
16
I/O
17
I/O
18
V
CC
CS
4
WE
4
I/O
27
A
3
A
4
A
5
Pin #
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
Function
WE
3
CS
3
GND
I/O
19
I/O
31
I/O
30
I/O
29
I/O
28
A
0
A
1
A
2
I/O
23
I/O
22
I/O
21
I/O
20
"P1" — 1.40" SQ PGA Type Package
Side View
.245
MAX
.025
.035
Bottom View
1.400 SQ
MAX
1.000
TYP
.600
TYP
Pin 56
Pin 1
.050 DIA
TYP
.100 TYP
1.000
TYP
.020
.016
Pin 66
Pin 11
.145
MIN
.100
TYP
Aeroflex Circuit Technology ACT-S512K32V
5
SCD3360 REV B 12/17/98 Plainview NY (516) 694-6700
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