BUS-61553-54K datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > The embedded processor and controller> Microcontrollers and processors> BUS-61553-54K

BUS-61553-54K: DescriptionMicro Peripheral IC; CategoryThe embedded processor and controller Microcontrollers and processors; File Size50KB，4 Pages; ManufacturerData Device Corporation

Download Datasheet Parametric View All

BUS-61553-54K Overview

Micro Peripheral IC

BUS-61553-54K Parametric

Parameter Name	Attribute value
package instruction	,
Reach Compliance Code	unknown
Base Number Matches	1

Preview

Download Datasheet

View All

BUS-61553

MIL-STD-1553 ADVANCED INTEGRATED

MUX (AIM ) HYBRID

ALSO

SEE

IDE

R’S GU

USE

DESCRIPTION

DDC’s

BUS-61553

Advanced

Integrated Mux (AIM) Hybrid is a

complete

MIL-STD-1553

Bus

Controller (BC), Remote Terminal

Unit (RTU), and Bus Monitor (MT)

device. Packaged in a single 78-pin

DIP package, the BUS-61553 con-

tains dual low-power transceivers,

complete BC/RT/MT protocol logic, a

MIL-STD-1553-to-host interface unit

and 8K x 16 RAM.

Using an industry standard dual

transceiver and standard status and

control signals, the BUS-61553 sim-

plifies system integration at both the

MIL-STD-1553 and host processor

interface levels.

All 1553 operations are controlled

through the CPU access to the

shared 8K x 16 RAM. To ensure

maximum design flexibility, memory

control lines are provided for attach-

ing external RAM to the BUS-61553

address and data buses and for dis-

abling internal memory; the total

combined memory space can be

expanded to 64K x 16. All 1553 trans-

fers are entirely memory-mapped;

thus the CPU interface requires

minimal hardware and/or software

support.

The BUS-61553 operates over the

full military -55°C to +125°C temper-

ature range. Available screened to

MIL-PRF-38534, the BUS-61553 is

ideal for demanding military and

industrial microprocessor-to-1553

interface applications.

FEATURES

• Fully Intergrated Terminal

Including:

–Dual Transceiver

–BC/RT/MT Protocol

–Memory Management Unit

–Processor lnterface Logic

–8K x 16 RAM

• CMOS and Bipolar Technologies

• Internal Interrupt Status and Time

Tag Registers

• High Reliability

• 883B Processing Available

BUS-25679

DATA

BUS A

TRANSCEIVER A

TX INH

CONTENTION

RESOLVER

INTERRUPT

GENERATOR

CLOCK IN

CHANNEL A

ENCODER/

DECODER

MEMORY

TIMING

CPU

TIMING

MSTRCLR

SELECT

STRBD

READYD

RD/WR

MEM/REG

EXTEN

EXTLD

INT

TRANSFORMER A

768

µs

TIME OUT

PROTOCOL

CONTROLLER

A15-A00

BUS-25679

DATA

BUS B

TX INH

TRANSCEIVER B

D15-D00

TRANSFORMER B

CHANNEL B

ENCODER/

DECODER

8K x 16

SHARED RAM

PARITY

CHECKER

RT ADDR

RTAD0

RTAD1

RTAD2

RTAD3

RTAD4

RTAD P

RTPARERR

RAM

FIGURE 1. BU-61553 BLOCK DIAGRAM

Recommended Resources

Baby bedwetting voice alarm circuit

Dual time constant audio signal decoder circuit diagram

Simple ±9V power supply circuit

JSJ type transistor time relay circuit (1)

Oscillator circuit that can be switched by external signals

Experimental regulated power supply circuit diagram with sound and light alarm

Does analog electrical difference have a big impact on learning microcontrollers? What should I learn when learning microcontrollers?: I am studying measurement and control technology and instruments, and I really want to know what aspects of the knowledge I need to learn as a foundation for single-chip microcomputers. I wonder if an...; bingda Embedded System

Notice on the 2011 National Undergraduate Electronic Design Competition (03.01): [i=s]This post was last edited by paulhyde on 2014-9-15 09:01[/i]Organizing committees of each competition area and relevant colleges and universities:The National Undergraduate Electronic Design Comp...; fish001 Electronics Design Contest

[Help] After turning on the general interrupt in AD interrupt, the stack overflows!!!: There are two interrupts in the program, ADC12 and UART1. It works fine when only one of them is turned on.Both are turned on: ADC is normal, but the interrupt response of UART1 is very slow, and it c...; 冬小麦 Microcontroller MCU

How to return from the interrupt of 51?: I wrote a small experimental program, but I can't return after being interrupted. Could you please help me figure out where the problem is!!! Thanks............. #includeunsigned char Run[] = {0x01, 0...; xingcard Embedded System

Hiring embedded developers, as long as you have written C code for one year and used Linux system, (fresh graduates are also welcome): Since the project is urgent and several kernels have left, we are hiring urgently! The monthly salary is about 4k! Interested parties please send your resume to zhaopin@hltong.cn,...; kedou000007 Linux and Android

stm32 mpu9250 dmp: How can I use dmp to read the raw nine-axis data of mpu9250? I found the function, but I don't know what to fill in the parameters. Does anyone know?...; x1073 stm32/stm8

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components