BSI
n
FEATURES
Ultra Low Power/Voltage CMOS SRAM
64K X 16 bit
n
DESCRIPTION
BS616UV1010
Ÿ
Ultra low V
CC
operation voltage : 1.9V ~ 3.6V
Ÿ
Very low power consumption :
V
CC
= 2.0V
10mA(Max.) operating current
0.01uA (Typ.) CMOS standby current
V
CC
= 3.0V
18mA(Max.) operating current
0.02uA (Typ.) CMOS standby current
Ÿ
High speed access time :
-10
100ns(Max.)
Ÿ
Automatic power down when chip is deselected
Ÿ
Easy expansion with CE and OE options
Ÿ
I/O Configuration x8/x16 selectable by LB and UB pin.
Ÿ
Three state outputs and TTL compatible
Ÿ
Fully static operation
Ÿ
Data retention supply voltage as low as 1.5V
The BS616UV1010 is a high performance, ultra low power CMOS Static
Random Access Memory organized as 65,536 words by 16 bits and
operates form a wide range of 1.9V to 3.6V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with typical CMOS standby current of
0.01uA and maximum access time of 100ns in 1.9V operation.
Easy memory expansion is provided by an active LOW chip enable (CE)
and active LOW output enable (OE) and three-state output drivers.
The BS616UV1010 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS616UV1010 is available in JEDEC standard 44-pin TSOP II and
48-ball BGA package.
n
PRODUCT FAMILY
POWER DISSIPATION
PRODUCT
FAMILY
BS616UV1010EC
BS616UV1010AC
BS616UV1010EI
BS616UV1010AI
-40
O
C to +85
O
C
1.9V ~ 3.6V
100
1.5uA
1.0uA
20mA
15mA
OPERATING
TEMPERATURE
+0
O
C to +70
O
C
V
CC
RANGE
SPEED
(ns)
STANDBY
(I
CCSB1
, Max)
Operating
(I
CC
, Max)
PKG TYPE
TSOP2-44
BGA-48-0608
TSOP2-44
BGA-48-0608
V
CC
=3.0V
V
CC
=2.0V
V
CC
=3.0V
V
CC
=2.0V
1.9V ~ 3.6V
100
1.0uA
0.5uA
20mA
15mA
n
PIN CONFIGURATIONS
A4
A3
A2
A1
A0
CE
DQ0
DQ1
DQ2
DQ3
VCC
VSS
DQ4
DQ5
DQ6
DQ7
WE
A15
A14
A13
A12
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
DQ15
DQ14
DQ13
DQ12
VSS
VCC
DQ11
DQ10
DQ9
DQ8
NC
A8
A9
A10
A11
NC
n
BLOCK DIAGRAM
A8
A13
A15
A14
A12
A7
A6
A5
A4
2048
DQ0
.
.
.
.
.
.
DQ15
16
.
.
.
.
.
.
Data
Input
Buffer
16
128
Column Decoder
14
Control
Address Input Buffer
16
Column I/O
Write Driver
Sense Amp
Address
Input
Buffer
18
Row
Decoder
512 x 2048
512
Memory Array
BS616UV1010EC
BS616UV1010EI
1
A
B
C
D
E
F
G
H
UB
D8
D9
VSS
VCC
D14
D15
NC
2
OE
LB
D10
D11
D12
D13
NC
A8
3
A0
A3
A5
NC
NC
A14
A12
A9
4
A1
A4
A6
A7
NC
A15
A13
A10
5
A2
CE
D1
D3
D4
D5
WE
A11
6
NC
D0
D2
VCC
VSS
D6
D7
NC
16
Data
Output
Buffer
CE
WE
OE
UB
LB
V
CC
V
SS
A11 A9
A3
A2
A1
A0 A10
48-ball BGA top view
Brilliance Semiconductor, Inc.
reserves the right to modify document contents without notice.
R0201-BS616UV1010
1
Revision 2.4
May.
2005
BSI
n
PIN DESCRIPTIONS
BS616UV1010
Function
These 16 address inputs select one of the 65,536 x 16-bit words in the RAM
Name
A0-A15 Address Input
CE Chip Enable 1 Input
CE is active LOW. Chip enable must be active when data read form or write to the device.
If either chip enable is not active, the device is deselected and is in standby power mode.
The DQ pins will be in the high impedance state when the device is deselected.
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the DQ
pins; when WE is LOW, the data present on the DQ pins will be written into the selected
memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they will
be enabled. The DQ pins will be in the high impendence state when OE is inactive.
Lower byte and upper byte data input/output control pins.
WE Write Enable Input
OE Output Enable Input
LB and UB Data Byte Control Input
DQ0-DQ15 Data Input/Output
Ports
V
CC
V
SS
There 16 bi-directional ports are used to read data from or write data into the RAM.
Power Supply
Ground
n
TRUTH TABLE
MODE
Not selected
(Power Down)
Output Disabled
CE
H
L
WE
X
H
OE
X
H
LB
X
X
L
UB
X
X
L
L
H
L
L
H
DQ0~DQ7
High Z
High Z
D
OUT
High Z
D
OUT
D
IN
X
D
IN
DQ8~DQ15
High Z
High Z
D
OUT
D
OUT
High Z
D
IN
D
IN
X
V
CC
CURRENT
I
CCSB
, I
CCSB1
I
CC
I
CC
I
CC
I
CC
I
CC
I
CC
I
CC
Read
L
H
L
H
L
L
Write
L
L
X
H
L
NOTES: H means V
IH
; L means V
IL
; X means don’t care (Must be V
IH
or V
IL
state)
R0201-BS616UV1010
2
Revision 2.4
May.
2005
BSI
n
ABSOLUTE MAXIMUM RATINGS
SYMBOL
V
TERM
T
BIAS
T
STG
P
T
I
OUT
(1)
BS616UV1010
n
OPERATING RANGE
UNITS
V
O
O
PARAMETER
Terminal Voltage with
Respect to GND
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
RATING
-0.5 to 7.0
-40 to +125
-60 to +150
1.0
20
RANG
Commercial
Industrial
AMBIENT
TEMPERATURE
0
O
C to + 70
O
C
-40
O
C to + 85
O
C
Vcc
1.9V ~ 3.6V
1.9V ~ 3.6V
C
C
W
mA
n
CAPACITANCE
(1)
(T
A
= 25 C, f = 1.0MHz)
MAX.
UNITS
pF
pF
O
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
O
O
SYMBOL PAMAMETER CONDITIONS
C
IN
Input
V
IN
= 0V
6
Capacitance
Input/Output
C
IO
V
I/O
= 0V
8
Capacitance
1. This parameter is guaranteed and not 100% tested.
n
DC ELECTRICAL CHARACTERISTICS (T
A
= -40 C to +85 C)
PARAMETER
NAME
V
CC
V
IL
V
IH
I
IL
I
LO
V
OL
V
OH
I
CC
I
CCSB
I
CCSB1
(5)
PARAMETER
Power Supply
Input Low Voltage
Input High Voltage
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Operating
Current
Power
Supply
V
IN
= 0V to V
CC
V
I/O
= 0V to V
CC
,
CE= V
IH
or OE = V
IH
V
CC
= Max, I
OL
= 1.0mA
V
CC
= Max, I
OL
= 2.0mA
V
CC
= Min, I
OH
= -0.5mA
V
CC
= Min, I
OH
= -1.0mA
CE = V
IL
,
I
IO
= 0mA, f = F
MAX(4)
CE = V
IH
,
I
IO
= 0mA
V
CC
=2.0V
V
CC
=3.0V
V
CC
=2.0V
V
CC
=3.0V
V
CC
=2.0V
V
CC
=3.0V
V
CC
=2.0V
V
CC
=3.0V
V
CC
=2.0V
V
CC
=3.0V
V
CC
=2.0V
V
CC
=3.0V
TEST CONDITIONS
MIN.
1.9
-0.5
(2)
1.4
2.0
--
--
--
V
CC
-0.2
2.4
--
--
TYP.
(1)
--
--
--
--
--
--
--
--
--
MAX.
3.6
0.6
0.8
V
CC
+0.2
(3)
1
1
0.2
0.4
--
15
20
0.5
1.0
UNITS
V
V
V
uA
uA
V
V
mA
mA
Standby Current
–
TTL
Standby Current
–
CMOS
CE≧V
CC
-0.2V
0.01
1.0
V
CC
=2.0V
--
uA
V
IN
≧V
CC
-0.2V or V
IN
≦0.2V
0.02
1.5
V
CC
=3.0V
1. Typical characteristics are at T
A
=25
O
C.
4. F
MAX
=1/t
RC.
2. Undershoot: -1.0V in case of pulse width less than 20 ns.
5. I
CCSB1(MAX.)
is 0.5uA/1.0uA at V
CC
=2.0V/3.0V and T
A
=70
O
C.
3. Overshoot: V
CC
+1.0V in case of pulse width less than 20 ns.
n
DATA RETENTION CHARACTERISTICS (T
A
= -40 C to +85 C)
SYMBOL
V
DR
I
CCDR
(3)
O
O
PARAMETER
V
CC
for Data Retention
Data Retention Current
Chip Deselect to Data
Retention Time
Operation Recovery Time
TEST CONDITIONS
CE≧V
CC
-0.2V
V
IN
≧V
CC
-0.2V or V
IN
≦0.2V
CE≧V
CC
-0.2V
V
IN
≧V
CC
-0.2V or V
IN
≦0.2V
MIN.
1.5
--
0
TYP.
(1)
--
0.01
--
--
MAX.
--
0.3
--
--
UNITS
V
uA
ns
ns
t
CDR
t
R
See Retention Waveform
t
RC (2)
1. V
CC
=1.5V, T
A
=25
O
C.
2. t
RC
= Read Cycle Time.
3. I
CCRD_Max.
is 0.2uA at T
A
=70
O
C.
R0201-BS616UV1010
3
Revision 2.4
May.
2005
BSI
n
LOW V
CC
DATA RETENTION WAVEFORM (1) (CE Controlled)
Data Retention Mode
V
DR
≧1.5V
BS616UV1010
V
CC
V
CC
V
CC
V
IH
t
CDR
CE≧V
CC
- 0.2V
t
R
V
IH
CE
n
AC TEST CONDITIONS
(Test Load and Input/Output Reference)
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing
Reference Level
Output Load
t
CLZ
, t
OLZ
, t
CHZ
, t
OHZ
, t
WHZ
Others
Vcc / 0V
1V/ns
0.5Vcc
C
L
= 5pF+1TTL
C
L
= 30pF+1TTL
ALL INPUT PULSES
1 TTL
Output
C
L(1)
V
CC
GND
10%
90%
90%
10%
n
KEY TO SWITCHING WAVEFORMS
WAVEFORM
INPUTS
MUST BE
STEADY
MAY CHANGE
FROM
“H”
TO
“L”
MAY CHANGE
FROM
“L”
TO
“H”
DON’T CARE
ANY CHANGE
PERMITTED
DOES NOT
APPLY
OUTPUTS
MUST BE
STEADY
WILL BE CHANGE
FROM
“H”
TO
“L”
WILL BE CHANGE
FROM
“L”
TO
“H”
CHANGE :
STATE UNKNOW
CENTER LINE IS
HIGH INPEDANCE
“OFF”
STATE
→ ←
Rise Time:
1V/ns
→ ←
Fall Time:
1V/ns
1. Including jig and scope capacitance.
n
AC ELECTRICAL CHARACTERISTICS (T
A
= -40 C to +85 C)
READ CYCLE
JEDEC
PARAMETER
NAME
PARANETER
NAME
CYCLE TIME : 100ns
MIN.
TYP.
MAX.
100
--
(CE)
(LB, UB)
--
--
--
(CE)
(LB, UB)
15
15
15
(CE)
(LB, UB)
--
--
--
15
--
--
--
--
--
--
--
--
--
--
--
--
--
100
100
100
50
--
--
--
40
40
35
--
O
O
DESCRIPTION
Read Cycle Time
Address Access Time
Chip Select Access Time
Data Byte Control Access Time
Output Enable to Output Valid
Chip Select to Output Low Z
Data Byte Control to Output Low Z
Output Enable to Output Low Z
Chip Select to Output High Z
Data Byte Control to Output High Z
Output Enable to Output High Z
Data Hold from Address Change
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
AVAX
t
AVQX
t
ELQV
t
BLQV
t
GLQV
t
ELQX
t
BLQX
t
GLQX
t
EHQZ
t
BHQZ
t
GHQZ
t
AVQX
t
RC
t
AA
t
ACS
t
BA
t
OE
t
CLZ
t
BE
t
OLZ
t
CHZ
t
BDO
t
OHZ
t
OH
R0201-BS616UV1010
4
Revision 2.4
May.
2005
BSI
n
SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE 1
(1,2,4)
BS616UV1010
t
RC
ADDRESS
t
OH
D
OUT
(1,3,4)
t
AA
t
OH
READ CYCLE 2
CE
t
ACS
t
BA
LB, UB
t
BE
D
OUT
t
CLZ
(5)
t
CHZ
t
BDO
(5)
READ CYCLE 3
(1, 4)
t
RC
ADDRESS
t
AA
OE
t
OE
CE
t
CLZ
LB, UB
(5)
t
OH
t
OLZ
t
OHZ
t
CHZ
t
BA
t
BE
t
BDO
(5)
(1,5)
D
OUT
NOTES:
1. WE is high in read Cycle.
2. Device is continuously selected when CE = V
IL
.
3. Address valid prior to or coincident with CE transition low.
4. OE = V
IL
.
5. Transition is measured
±
500mV from steady state with C
L
= 5pF.
The parameter is guaranteed but not 100% tested.
R0201-BS616UV1010
5
Revision 2.4
May.
2005
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