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BS62LV1025JCP70

Description
Standard SRAM, 128KX8, 70ns, CMOS, PDSO32, 0.300 INCH, LEAD FREE, PLASTIC, SOJ-32
Categorystorage    storage   
File Size424KB,10 Pages
ManufacturerBrilliance
Environmental Compliance
Download Datasheet Parametric View All

BS62LV1025JCP70 Overview

Standard SRAM, 128KX8, 70ns, CMOS, PDSO32, 0.300 INCH, LEAD FREE, PLASTIC, SOJ-32

BS62LV1025JCP70 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
package instructionSOJ, SOJ32,.34
Reach Compliance Codeunknown
Maximum access time70 ns
I/O typeCOMMON
JESD-30 codeR-PDSO-J32
length20.96 mm
memory density1048576 bit
Memory IC TypeSTANDARD SRAM
memory width8
Humidity sensitivity level3
Number of functions1
Number of terminals32
word count131072 words
character code128000
Operating modeASYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize128KX8
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Encapsulate equivalent codeSOJ32,.34
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
power supply5 V
Certification statusNot Qualified
Maximum seat height3.56 mm
Maximum standby current3e-7 A
Minimum standby current1.5 V
Maximum slew rate0.035 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
width7.62 mm
Base Number Matches1
BSI
FEATURES
Very Low Power/Voltage CMOS SRAM
128K X 8 bit
DESCRIPTION
BS62LV1025
• Vcc operation voltage : 4.5V ~ 5.5V
• Very low power consumption :
Vcc = 5.0V C-grade : 35mA (Max.) operating current
I- grade : 40mA (Max.) operating current
0.4uA (Typ.) CMOS standby current
• High speed access time :
-55
55ns (Max.) at Vcc = 5.0V
-70
70ns (Max.) at Vcc = 5.0V
• Automatic power down when chip is deselected
• Three state outputs and TTL compatible
• Fully static operation
• Data retention supply voltage as low as 1.5V
• Easy expansion with CE2, CE1, and OE options
PRODUCT FAMILY
PRODUCT
FAMILY
BS62LV1025SC
BS62LV1025TC
BS62LV1025STC
BS62LV1025PC
BS62LV1025JC
BS62LV1025DC
BS62LV1025SI
BS62LV1025TI
BS62LV1025STI
BS62LV1025PI
BS62LV1025JI
BS62LV1025DI
OPERATING
TEMPERATURE
Vcc
RANGE
The BS62LV1025 is a high performance, very low power CMOS
Static Random Access Memory organized as 131,072 words by 8 bits
and operates from a wide range of 4.5V to 5.5V supply voltage.
Advanced CMOS technology and circuit techniques provide both high
speed and low power features with a typical CMOS standby current of
0.4uA and maximum access time of 55ns in 5V operation.
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active LOW
output enable (OE) and three-state output drivers.
The BS62LV1025 has an automatic power down feature, reducing the
power consumption significantly when chip is deselected.
The BS62LV1025 is available in DICE form , JEDEC standard 32 pin
450mil Plastic SOP, 300mil Plastic SOJ , 600mil Plastic DIP, 8mmx
13.4mm STSOP and 8mmx20mm TSOP.
SPEED
(ns)
Vcc= 5.0V
POWER DISSIPATION
STANDBY
Operating
(I
CCSB1
, Max)
(I
CC
, Max)
PKG TYPE
SOP-32
TSOP-32
STSOP-32
PDIP-32
SOJ-32
DICE
SOP-32
TSOP-32
STSOP-32
PDIP-32
SOJ-32
DICE
Vcc=5.0V
Vcc=5.0V
+0 C to +70 C
O
O
4.5V ~ 5.5V
55 / 70
3.0uA
35mA
-40 C to +85 C
O
O
4.5V ~ 5.5V
55 / 70
5.0uA
40mA
PIN CONFIGURATIONS
NC
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
DQ0
DQ1
DQ2
GND
1
2
3
4
5
6
BS62LV1025SC
7
BS62LV1025SI
8
BS62LV1025PC
9
BS62LV1025PI
BS62LV1025JC
10
BS62LV1025JI
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
VCC
A15
CE2
WE
A13
A8
A9
A11
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
BLOCK DIAGRAM
A6
A7
A12
A14
A16
A15
A13
A8
A9
A11
Address
Input
Buffer
20
Row
Decoder
1024
Memory Array
1024 x 1024
1024
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
8
Data
Input
Buffer
8
Column I/O
Write Driver
Sense Amp
128
Column Decoder
14
Control
Address Input Buffer
A11
A9
A8
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
BS62LV1025TC
BS62LV1025STC
BS62LV1025TI
BS62LV1025STI
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
A1
A2
A3
8
Data
Output
Buffer
8
Brilliance Semiconductor, Inc
.
reserves the right to modify document contents without notice.
R0201-BS62LV1025
CE2
CE1
WE
OE
Vdd
Gnd
A5 A4 A3 A2 A1 A0 A10
1
Revision 2.3
Jan.
2004
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