BU-61582
SPACE LEVEL MIL-STD-1553 BC/RT/MT
ADVANCED COMMUNICATION ENGINE
ACE User’s Guide
Also Available
NOW
MEETS
1 MRAD
!
DESCRIPTION
DDC’s BU-61582 Space Advanced
Communication Engine (SP’ACE) is a
radiation hardened version of the BU-
61580 ACE terminal. DDC is able to
supply the BU-61582 with enhanced
screening for space and other high
reliability applications.
The BU-61582 provides a complete
integrated
BC/RT/MT
interface
between a host processor and a MIL-
STD-1553 bus. The BU-61582 pro-
vides functional and software compat-
ibility with the standard BU-61580
product and is packaged in the same
1.9-square-inch package footprint.
As an option, DDC can supply the
BU-61582 with space level screening.
This entails enhancements in the
areas of element evaluation and
screening procedures for active and
passive elements, as well as the man-
ufacturing and screening processes
used in producing the terminals.
The BU-61582 integrates dual trans-
ceiver, protocol, memory manage-
ment and processor interface logic,
and 16K words of RAM in the choice
of 70-pin DIP or flat pack packages.
Transceiverless versions may be
used with an external electrical or
fiber optic transceiver.
To minimize board space and ‘glue’
logic, the SP’ACE terminals provide
ultimate flexibility in interfacing to a
host processor and internal/external
RAM.
FEATURES
• Radiation-Hardened to 1 MRad
• Fully Integrated 1553 Terminal
• Flexible Processor Interface
• 16K x 16 Internal RAM
• Automatic BC Retries
• Programmable BC Gap Times
• BC Frame Auto-Repeat
• Intelligent RT Data Buffering
• Small Ceramic Package
• Available to SMD 5962-96887
16K X 16
SHARED
RAM
CH. A
TRANSCEIVER
A
DATA
BUFFERS
PROCESSOR
DATA BUS
DATA BUS
DUAL
ENCODER/DECODER,
MULTIPROTOCOL
AND
MEMORY
MANAGEMENT
D15-D0
ADDRESS BUS
ADDRESS
BUFFERS
A15-A0
PROCESSOR
ADDRESS BUS
CH. B
TRANSCEIVER
B
RT ADDRESS
RTAD4-RTAD0, RTADP
PROCESSOR
AND
MEMORY
INTERFACE
LOGIC
TRANSPARENT/BUFFERED, STRBD, SELECT,
RD/WR, MEM/REG, TRIGGER_SEL/MEMENA-IN,
MSB/LSB/DTGRT
IOEN, MEMENA-OUT, READYD
ADDR_LAT/MEMOE, ZERO_WAIT/MEMWR,
8/16-BIT/DTREQ, POLARITY_SEL/DTACK
INT
PROCESSOR
AND
MEMORY
CONTROL
INTERRUPT
REQUEST
INCMD
MISCELLANEOUS
CLK_IN, TAG_CLK,
MSTCLR,SSFLAG/EXT_TRG
FIGURE 1. BU-61582 BLOCK DIAGRAM
©
1995, 1999 Data Device Corporation
SP’ACE SERIES RADIATION SPECIFICATIONS
PART NUMBER
TOTAL DOSE
SINGLE EVENT UPSET
SINGLE EVENT LATCHUP
3.6 x 10-5 errors/device-day,
BU-61582XX
1MRad
(LET Threshold of 59 MeV/mg/cm2)
HIGH RELIABILITY SCREENING OPTIONS
ELEMENT EVALUATION
Visual Inspection:
Integrated Circuits
Transistors & Diodes
Passive Components
SEM Analysis for Integrated Circuits
Element Evaluation:
Visual,
Electrical,
Wire Bondability,
24-Hour Stabilization Bake,
10 Temperature Cycles
5000 g’s constant acceleration
240-Hour Powered Burn-In
and 1000-Hour Life Test
(Burn-In and 1000-Hour Life
Test Are Only Required For
Active Components.)
ASSEMBLY & TEST
Particle Impact Noise Detection (PND)
320-Hour Burn-In
100% Non-Destructive
Wirebond Pull
Radiographic (X-Ray) Analysis
QCI TESTING
Extended Temperature Cycling:
20 Cycles Including Radiographic (X-Ray) Testing
Moisture Content Limit of 5000 PPM
MIL-STD-883, Method 1010 Condition C
and MIL-STD-883, Method 2012
MIL-STD-883, Method 1018
MIL-STD-883, Method 2020 Condition A
MIL-STD-883, Method 1015
MIL-STD-883, Method 2023
MIL-STD-883, Method 2012
METHOD
MIL-STD-883, Method 2010 Condition A
MIL-STD-750, Method 2072 and 2073
MIL-STD-883, Method 2032 Class S
MIL-STD-883, Method 2018
Immune
MIL-H-38534
0.215 (5.46) MAX
0.180 ±0.010 TYP
(4.57 ±0.25)
0.100 (2.54)
36
37
70
69
1.900 MAX
(48.26)
0.400
(10.16)
0.600
(15.24)
34
35
BOTTOM VIEW
2
0.018 ±0.002 DIA TYP
(0.46 ±0.05)
SIDE VIEW
0.100 (2.54) TYP
0.050 (1.27) TYP
1.700 (43.18)
1.900 (48.26) MAX
INDEX
DENOTES
PIN 1
BU-61582DX, 70-PIN DIP CERAMIC PACKAGE MECHANICAL OUTLINE
2
PIN 1 DENOTED BY
INDEX MARK
1
1.000 (MAX)
70
0.018
±0.002
34 EQ. SP. @
0.050 = 1.700
(TOL. NONCUM)
1.900 MAX
0.050 TYP
INDEX DENOTES PIN 1
35
36
PIN NUMBERS ARE
FOR REF. ONLY
0.215
MAX
0.065 (REF)
0.190
±0.010
0.080 MIN
0.012 MAX
0.010
±0.002
1.024 MAX
1.38
±0.02
0.040 TYP
0.050 MIN
NOTES:
1. DIMENSIONS ARE IN INCHES (MILLIMETERS).
2. PACKAGE MATERIAL: ALUMINA (AL2O3).
3. LEAD MATERIAL: KOVAR, PLATED BY 150µ MINIMUM NICKEL, PLATED BY 50µ MINIMUM GOLD.
BU-61582GX, 70-PIN GULL LEAD CERAMIC PACKAGE MECHANICAL OUTLINE
1.900 MAX
(48.26)
0.015
±
0.002 TYP
(0.381
±
0.051)
0.215 (5.46) MAX
70
36
INDEX DENOTES PIN 1
1.000 MAX
(25.4)
1
0.400 MIN TYP
(10.16)
0.050 TYP
(1.27)
35
0.010
±
0.002 TYP
(0.254
±
0.051)
34 EQ SP @ 0.050 = 1.700
(43.18) (1.27) TOL NONCUM
0.070
±
0.010
(1.78)
PIN NUMBERS
FOR REF ONLY
TOP VIEW
SIDE VIEW
NOTES:
1. DIMENSIONS ARE IN INCHES (MILLIMETERS).
2. PACKAGE MATERIAL: ALUMINA (AL2O3).
3. LEAD MATERIAL: KOVAR, PLATED BY 150µ MINIMUM NICKEL, PLATED BY 50µ MINIMUM GOLD.
BU-61582FX, 70-PIN FLAT PACK CERAMIC PACKAGE MECHANICAL OUTLINE
3
ORDERING INFORMATION
BU-61582XX-XXXX
Supplemental Process Requirements:
S = Pre-Cap Source Inspection
L = Pull Test
Q = Pull Test and Pre-Cap Inspection
K = One Lot Date Code
W = One Lot Date Code and PreCap Source
Y = One Lot Date Code and 100% Pull Test
Z = One Lot Date Code, PreCap Source and 100% Pull Test
Blank = None of the Above
Other Criteria:
0 = No X Ray
1 = X Ray
Process Requirements:
0 = Standard DDC Processing, no Burn-In (See page xiii.)
1 = MIL-PRF-38534 Compliant*
2 = B**
3 = MIL-PRF-38534 Compliant with PIND Testing*
4 = MIL-PRF-38534 Compliant with Solder Dip*
5 = MIL-PRF-38534 Compliant with PIND Testing and Solder Dip*
6 = B** with PIND Testing
7 = B** with Solder Dip
8 = B** with PIND Testing and Solder Dip
9 = Standard DDC Processing with Solder Dip, no Burn-In (See page xiii.)
Temperature Grade/Data Requirements:
1 = -55°C to +125°C
2 = -40°C to +85°C
3 = 0°C to +70°C
4 = -55°C to +125°C with Variables Test Data
5 = -40°C to +85°C with Variables Test Data
8 = 0°C to +70°C with Variables Test Data
Voltage Transceiver Option:
0 = No Transceiver
1 = +5/-15 V
2 = +5/-12 V
Package:
D = DIP
F = Flat Pack
G = Gull Leads (Above “Process Requirements” must include solder dip.)
Product Type:
61582 = 70-Pin BC/RT/MT with 16K x 16 Internal RAM
61583 = 70-Pin BC/RT/MT with 16K x 16 Internal RAM and with RT Address Latch
*MIL-PRF-38534 Compliant products include 320 hours of burn-in and 100% non-destruct pull-test. “Supplemental Process
Requirements” must be an “L” or a “Q” for MIL-PRF-38534 compliant parts.
**Standard DDC Processing with burn-in and full temperature test — see table on page xiii.
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