CS18LV20483ACI-55 datasheet, PDF

CS18LV20483ACI-55: DescriptionStandard SRAM, 256KX8, 55ns, CMOS, PDSO32, 0.450 INCH, SOP-32; Categorystorage storage; File Size753KB，16 Pages; ManufacturerChiplus Semiconductor Corp

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CS18LV20483ACI-55 Overview

Standard SRAM, 256KX8, 55ns, CMOS, PDSO32, 0.450 INCH, SOP-32

Parameter Name	Attribute value
package instruction	0.450 INCH, SOP-32
Reach Compliance Code	compliant
Maximum access time	55 ns
JESD-30 code	R-PDSO-G32
length	20.447 mm
memory density	2097152 bit
Memory IC Type	STANDARD SRAM
memory width	8
Number of functions	1
Number of terminals	32
word count	262144 words
character code	256000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	256KX8
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Parallel/Serial	PARALLEL
Maximum seat height	2.997 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
width	11.303 mm
Base Number Matches	1

High Speed Super Low Power SRAM

256K-Word By 8 Bit

CS18LV20483

Revision History

Rev. No.

1.0

History

Initial issue

Issue Date

Jan.26,2005

Remark

Rev. 1.0

Chiplus reserves the right to change product or specification without notice.

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