EEWORLDEEWORLDEEWORLD

Part Number

Search

1600GGH1529C2DB

Description
Strain Guage Sensor, Gage, 0Psi Min, 1500Psi Max, 0.5%, 0.20-10.20V, Cylindrical
CategoryThe sensor    Sensor/transducer   
File Size507KB,4 Pages
ManufacturerGems Sensors & Controls
Download Datasheet Parametric View All

1600GGH1529C2DB Overview

Strain Guage Sensor, Gage, 0Psi Min, 1500Psi Max, 0.5%, 0.20-10.20V, Cylindrical

1600GGH1529C2DB Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
Reach Compliance Codeunknow
Maximum accuracy(%)0.5%
shellSTAINLESS STEEL
Nominal offset0.20V
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output range0.20-10.20V
Output typeANALOG VOLTAGE
Package Shape/FormCYLINDRICAL
port typeSS NOSE CONE
Maximum pressure range1500 Psi
Minimum pressure range
Pressure sensing modeGAGE
Sensor/Transducer TypePRESSURE SENSOR,STRAIN GUAGE
Maximum supply voltage35 V
Minimum supply voltage1.5 V
Termination typeBENDIX TWIST PLUG
Base Number Matches1
IAR go to definition of function help!
The routines in StellarisWare can use this function. Right-click the function name and then left-click to jump to the function definition. But the newly created project cannot use it. Right-click the ...
冰空影 Microcontroller MCU
Hello everyone, does anyone know about the BD1R2K motor driver chip?
As the title says, I disassembled a quadcopter. The words on the motor driver chip on the flight control board are 4824 and BD1R2K. Does anyone know this chip? I can't find it on the Internet. Because...
wudayongnb DIY/Open Source Hardware
40 experiments for beginners of microcontrollers
40 experiments for beginners of microcontrollers...
yang592886266 MCU
Thank you for being there, thank you for being polite!
Thank you for being there, thank you for being polite! The fourth Thursday of November is Thanksgiving! Although it is a foreign holiday, but with a grateful heart, thank you for all the experiences, ...
okhxyyo Talking
FPGA chip design
It can usually be divided into the following five steps. ( 1 ) Conversion: convert multiple design files and merge them into a design library file. ( 2 ) Mapping: map the logic gates in the netlist in...
dzyjc7 FPGA/CPLD
Visual DSP++ 4.5 code compression (Zlib) problem, please share!!!
Visual DSP++ 4.5 version, its own Zlib (BF531 session) can use L1 compression method to complete the compression of relatively small code. But when the source code is relatively large, it cannot compl...
wangzicc Embedded System

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 514  1863  1391  122  2176  11  38  29  3  44 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号