Tentative
DRAF113Z
Silicon PNP epitaxial planar type
For digital circuits
Marking Symbol :
Ｌ1
Package Code : ML3-N4-B
Absolute Maximum Ratings Ta = 25 °C
Parameter
Collector-base voltage (Emitter open)
Collector-emitter voltage (Base open)
Collector current
Total power dissipation
Junction temperature
Storage temperature
DRAF113Z
Total pages
page
Internal Connection
Rating
-50
-50
-100
100
150
-55 to +150
Symbol
VCBO
VCEO
IC
PT
Tj
Tstg
Unit
V
V
mA
mW
°C
°C
R1
B
R2
C
E
Resistance
value
Pin name
kΩ
1
R1
kΩ
R2
10
1.
Base
2.
Emitter
3.
Collector
Electrical Characteristics Ta = 25 °C±3 °C
Parameter
Symbol
Conditions
IC = -10
μA,
IE = 0
IC = -2 mA, IB = 0
VCB = -50 V, IE = 0
VCE = -50 V, IB = 0
VEB = -6 V, IC = 0
VCE = -10 V, IC = -5 mA
IC = -10 mA, IB = -0.5 mA
VCE = -0.2 V, IC = -5 mA
VCE = -5 V, IC = -100
μA
Min
-50
-50
Typ
Max
-0.1
-0.5
-1.5
Unit
V
V
μA
μA
mA
-
V
V
kΩ
-
Collector-base voltage (Emitter open)
VCBO
Collector-emitter voltage (Base open)
VCEO
Collector-base cutoff current (Emitter open)
ICBO
Collector-emitter cutoff current (Base open)
ICEO
Emitter-base cutoff current (Collector open)
IEBO
Forward current transfer ratio
hFE
Collector-emitter saturation voltage
VCE(sat)
Vi(on)
Input voltage
Vi(off)
Input resistance
R1
Resistance ratio
R1/R2
30
-0.25
-1.0
-0.4
-30%
1
+30%
0.08 0.10 0.12
Note: Measuring methods are based on JAPANESE INDUSTRIAL STANDARD JIS C 7030 Measuring
methods for transistors.
Packing
Embossed type (Thermo-compression sealing) : 10 000 pcs / reel
2010.2.25
2010.7.9
Prepared
Revised
Semiconductor Company, Panasonic Corporation
Request for your special attention and precautions in using the technical information and
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other company. Therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any
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Consult our sales staff in advance for information on the following applications:
–
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