Available in Commercial and Industrial temperature
ranges
Available in 8-pin SOIC and TSSOP Packages
P2384A
Product Description
The P2384A is a versatile frequency multiplier that is
designed specifically as cost effective alternative to the
high precision frequency oscillator.
The P2384A can generate a 4X output clock of the input
frequency that allows system cost savings by using an
inexpensive crystal or resonator to achieve high frequency
multiplication.
The P2384A provides up to 312 MHz output clock
frequency through the use of the Phase-Lock-Loop (PLL)
technique which delivers low jitter and high precision
synthesized clocks.
Applications
The P2384A is targeted towards the high frequency CAN
OSC replacement market.
systems.
Applications include xDSL,
routers, networking, PC peripherals, and embedded
Block Diagram
PDB
FS0
LF
VDD
PLL
Modulation
XIN
XOUT
Crystal
Oscillator
Frequency divider
Phase detector
Feedback divider
CLKOUT
VCO
Output
divider
VSS
PulseCore Semiconductor Corporation
1715 S. Bascom Ave Suite 200, Campbell, CA 95008
•
Tel: 408-879-9077
•
Fax: 408-879-9018
www.pulsecoresemi.com
Notice: The information in this document is subject to change without notice.
February 2007
rev 0.2
Pin Configuration
XIN
1
XOUT
2
8
P2384A
VDD
FS0
CLKOUT
VSS
P2384A
7
6
5
PDB
3
LF
4
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin Name
XIN
XOUT
PDB
LF
VSS
CLKOUT
FS0
VDD
Type
I
O
I
I
P
O
I
P
Description
Crystal connection or external reference frequency input
Crystal connection. If using an external reference, this pin must be left
unconnected.
Power-down control pin. Pull low to enable power-down mode. Connect directly to
VDD in normal operation and if not used.
External loop filter for the PLL. (See Loop Filter Selection Table for value.)
Ground connection. Connect to system ground.
Clock output.
Digital logic input used to select Input frequency range.
(See Input Frequency Selection.) This pin has an internal pull-up resistor.
Connect to +3.3 V.
Input Frequency Selection
FS0
0
1
Input (MHz)
20 to 38
39 to 78
Output Frequency Scaling (MHz)
80 to 152
156 to 312
Low Cost Frequency Multiplier
Notice: The information in this document is subject to change without notice.
2 of 10
February 2007
rev 0.2
Loop Filter Selection Table ( VDD 3.3 V )
Pin 4 LF
C2
R1
C1
P2384A
Input (MHz)
20
21 - 22
23 - 24
25 - 26
27 - 28
29 - 30
31 - 32
33 - 34
35 - 36
37 - 38
39 - 42
43 - 46
47 - 50
51 - 54
55 - 58
59 - 62
63 - 66
67 - 70
71 - 74
75 - 78
FS0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
C1(pF)
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
270
C2(pF)
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
100,000
R1 (ohms)
330
390
510
560
620
750
820
910
1,000
1,200
330
390
510
560
620
750
820
910
1,000
1,200
Low Cost Frequency Multiplier
Notice: The information in this document is subject to change without notice.
3 of 10
February 2007
rev 0.2
Output Clock Selection Example
P2384A
The P2384A can generate 4X Clock from the Input reference frequency. P2384A’s internal crystal oscillator circuits allow
the use of an inexpensive crystal or resonator to replace expensive CAN oscillators that are used in networking, PC
peripherals, xDSL, and consumer applications for high frequency generation. Its input frequency range is optimized for
operations from 20 MHz to 78 MHz, and its output frequency can deliver up to 312 MHz.
25 MHz
1 XIN
2 XOUT
3 PDB
R1
C1
4 LF
VDD 8
FS0 7
CLKOUT 6
0.1µF
+3.3V
Modulated 100 MHz
VSS 5
P2384A
C2
Low Cost Frequency Multiplier
Notice: The information in this document is subject to change without notice.
4 of 10
February 2007
rev 0.2
Absolute Maximum Ratings
Symbol
V
DD
, V
IN
T
STG
T
A
T
s
T
J
T
DV
Storage temperature
Operating temperature
Max. Soldering Temperature (10 sec)
Junction Temperature
Static Discharge Voltage
(As per JEDEC STD 22- A114-B)
P2384A
Parameter
Voltage on any pin with respect to Ground
Rating
-0.5 to +4.6
-65 to +125
-40 to +85
260
150
2
V
Unit
°C
°C
°C
°C
KV
Note: These are stress ratings only and are not implied for functional use. Exposure to absolute maximum ratings for prolonged periods of time may affect
device reliability.
DC Electrical Characteristics
Symbol
V
IL
V
IH
I
IL
I
IH
I
XOL
I
XOH
V
OL
V
OH
I
DD
I
CC
V
DD
t
ON
Z
OUT
Input low voltage
Input high voltage
Input low current
(Internal input pull-up resistor on FS0 and PDB)
Input high current
(Internal input pull-up resistor on FS0 and PDB)
XOUT output low current
XOUT output high current
Output low voltage (V
DD
= 3.3 V, I
OL
= 20 mA)
Output high voltage (V
DD
= 3.3 V, I
OH
= 20 mA)
Static supply current*
Typical dynamic supply current
(25 pF scope probe loading)
Operating voltage
Power-up time
Clock output impedance
Parameter
Min
VSS - 0.3
2.0
–
–
–
–
–
2.5
–
–
3.0
–
–
Typ
–
–
180
0
10
10
–
–
3
28
3.3
7
28
Max
0.8
VDD + 0.3
–
–
–
–
0.4
–
–
–
3.6
–
–
Unit
V
V
µA
µA
mA
mA
V
V
mA
mA
V
mS
Ω
* XIN and PBD are pulled low.
Low Cost Frequency Multiplier
Notice: The information in this document is subject to change without notice.
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