PC48F4400P0UBB0 datasheet, PDF

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PC48F4400P0UBB0: DescriptionStrataFlash㈢ Cellular Memory; File Size2MB，139 Pages; ManufacturerNumonyx ( Micron ); Websitehttps://www.micron.com

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PC48F4400P0UBB0 Overview

StrataFlash㈢ Cellular Memory

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Numonyx™ StrataFlash

Cellular Memory

(M18)

Datasheet

Product Features

High-Performance Read, Program and Erase

— 96 ns initial read access

— 108 MHz with zero wait-state synchronous

burst reads: 7 ns clock-to-data output

— 133 MHz with zero wait-state synchronous

burst reads: 5.5 ns clock-to-data output

— 8-, 16-, and continuous-word

synchronous-burst Reads

— Programmable WAIT configuration

— Customer-configurable output driver

impedance

— Buffered Programming:

2.0 µs/Word (typ), 512-Mbit 65 nm;

Block Erase: 0.9 s per block (typ)

— 20 µs (typ) program/erase suspend

Architecture

— 16-bit wide data bus

— Multi-Level Cell Technology

— Symmetrically-Blocked Array Architecture

— 256-Kbyte Erase Blocks

— 1-Gbit device: Eight 128-Mbit partitions

— 512-Mbit device: Eight 64-Mbit partitions

— 256-Mbit device: Eight 32-Mbit partitions.

— 128-Mbit device: Eight 16-Mbit partitions.

— Read-While-Program and Read-While-Erase

— Status Register for partition/device status

— Blank Check feature

Quality and Reliability

— Expanded temperature: –30 °C to +85 °C

— Minimum 100,000 erase cycles per block

— ETOX™ X Process Technology (65 nm)

— ETOX™ IX Process Technology (90 nm)

Power

— Core voltage: 1.7 V - 2.0 V

— I/O voltage: 1.7 V - 2.0 V

— Standby current: 60 µA (typ) for 512-Mbit,

65 nm

— Deep Power-Down mode: 2 µA (typ)

— Automatic Power Savings mode

— 16-word synchronous-burst read current:

23 mA (typ) @ 108 MHz; 24 mA (typ) @

133 MHz

Software

— Numonyx™ Flash Data Integrator

(Numonyx™ FDI) optimized

— Basic Command Set and Extended

Command Set compatible

— Common Flash Interface

Security

— OTP Registers:

64 unique pre-programmed bits

2112 user-programmable bits

— Absolute write protection with V

= GND

— Power-transition erase/program lockout

— Individual zero-latency block locking

— Individual block lock-down

Density and Packaging

— Density: 128-, 256-, and 512-Mbit, and 1-

Gbit

— Address-data multiplexed and non-

multiplexed interfaces

— x16D (105-ball) Flash SCSP

— x16C (107-ball) Flash SCSP

— 0.8 mm pitch lead-free solder-ball

Order Number: 309823-11

April 2008

INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH NUMONYX™ PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR

OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN NUMONYX'S TERMS AND

CONDITIONS OF SALE FOR SUCH PRODUCTS, NUMONYX ASSUMES NO LIABILITY WHATSOEVER, AND NUMONYX DISCLAIMS ANY EXPRESS OR IMPLIED

WARRANTY, RELATING TO SALE AND/OR USE OF NUMONYX PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A

PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. Numonyx

products are not intended for use in medical, life saving, life sustaining, critical control or safety systems, or in nuclear facility applications.

Legal L ines and D isc laim er s

Numonyx B.V. may make changes to specifications and product descriptions at any time, without notice.

Numonyx B.V. may have patents or pending patent applications, trademarks, copyrights, or other intellectual property rights that relate to the presented

subject matter. The furnishing of documents and other materials and information does not provide any license, express or implied, by estoppel or

otherwise, to any such patents, trademarks, copyrights, or other intellectual property rights.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Numonyx reserves these for

future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

Contact your local Numonyx sales office or your distributor to obtain the latest specifications and before placing your product order.

Copies of documents which have an order number and are referenced in this document, or other Numonyx literature may be obtained by visiting the

Numonyx website at

http://www.numonyx.com.

Numonyx, the Numonyx logo, and StrataFlash are trademarks or registered trademarks of Numonyx B.V. or its subsidiaries in other countries.

*Other names and brands may be claimed as the property of others.

Datasheet

April 2008

Order Number: 309823-11

Numonyx™ StrataFlash

Cellular Memory (M18)

Contents

1.0

Introduction

.............................................................................................................. 8

1.1

Document Purpose .............................................................................................. 8

1.2

Nomenclature ..................................................................................................... 8

1.3

Acronyms........................................................................................................... 8

1.4

Conventions ....................................................................................................... 9

Functional Description

............................................................................................. 10

2.1

Product Overview .............................................................................................. 10

2.2

Configuration and Memory Map ........................................................................... 11

2.3

Device ID ......................................................................................................... 12

Package Information

............................................................................................... 13

Ballouts and Signal Descriptions..............................................................................

4.1

Ballouts, x16D .................................................................................................. 23

4.1.1 x16D (105-Ball) Ballout, Non-Mux ............................................................ 23

4.1.2 x16D (105-Ball) Ballout, AD-Mux.............................................................. 24

4.1.3 x16D Mux (105-Ball) Ballout, AA/D Mux .................................................... 25

4.2

Signal Descriptions, x16D................................................................................... 26

4.3

Ballouts, x16C .................................................................................................. 29

4.3.1 x16C (107-Ball) Ballout, Non-Mux ............................................................ 29

4.3.2 x16C (107-Ball) Ballout, AD-Mux .............................................................. 31

4.3.3 x16C (107-Ball) Ballout, AA/D-Mux ........................................................... 32

4.4

Signal Descriptions x16C .................................................................................... 33

4.5

Ballouts, x16 Split Bus ....................................................................................... 37

4.5.1 x16 Split Bus (165-Ball) Ballout, Non-Mux ................................................. 37

4.6

Signal Descriptions, x16 Split Bus........................................................................ 38

Maximum Ratings and Operating Conditions............................................................

5.1

Absolute Maximum Ratings................................................................................. 42

5.2

Operating Conditions ......................................................................................... 42

Electrical Characteristics

......................................................................................... 43

6.1

Initialization ..................................................................................................... 43

6.1.1 Power-Up/Down Characteristics................................................................ 43

6.1.2 Reset Characteristics .............................................................................. 43

6.1.3 Power Supply Decoupling ........................................................................ 43

6.2

DC Current Specifications ................................................................................... 44

6.3

DC Voltage Specifications ................................................................................... 46

6.4

Capacitance...................................................................................................... 47

NOR Flash AC Characteristics...................................................................................

7.1

AC Test Conditions ............................................................................................ 48

7.2

Read Specifications............................................................................................ 49

7.2.1 Read Timing Waveforms.......................................................................... 52

7.2.2 Timings: Non-Mux Device, Async Read ...................................................... 53

7.2.3 Timings: Non-Mux Device, Sync Read ....................................................... 54

7.2.4 Timings: AD-Mux Device, Async Read ....................................................... 57

7.2.5 Timings: AD-Mux Device, Sync Read ......................................................... 58

7.3

Write Specifications ........................................................................................... 60

7.3.1 Write Timing Waveforms ......................................................................... 61

7.3.2 Timings: Non Mux Device ........................................................................ 62

7.3.3 Timings: AD-Mux Device ......................................................................... 65

7.4

Program and Erase Characteristics....................................................................... 68

2.0

3.0

4.0

5.0

6.0

7.0

April 2008

Order Number: 309823-11

Datasheet

Numonyx™ StrataFlash

Cellular Memory (M18)

7.5

7.6

8.0

Reset Specifications ...........................................................................................69

Deep Power Down Specifications..........................................................................69

NOR Flash Bus Interface

..........................................................................................71

8.1

Bus Reads ........................................................................................................71

8.1.1 Asynchronous single-word reads ...............................................................72

8.1.2 Asynchronous Page Mode (Non-multiplexed devices only) ............................72

8.1.3 Synchronous Burst Mode .........................................................................72

8.2

Bus Writes ........................................................................................................73

8.3

Reset ...............................................................................................................73

8.4

Deep Power-Down .............................................................................................73

8.5

Standby ...........................................................................................................74

8.6

Output Disable ..................................................................................................74

8.7

Bus Cycle Interleaving ........................................................................................74

8.7.1 Read Operation During Program Buffer fill ..................................................75

8.8

Read-to-Write and Write-to-Read Bus Transitions...................................................75

8.8.1 Write to Asynchronous read transition .......................................................75

8.8.2 Write to synchronous read transition .........................................................75

8.8.3 Asynchronous/Synchronous read to write transition.....................................75

8.8.4 Bus write with active clock .......................................................................75

NOR Flash Operations

..............................................................................................76

9.1

Status Register..................................................................................................76

9.1.1 Clearing the Status Register .....................................................................77

9.2

Read Configuration Register ................................................................................77

9.2.1 Latency Count ........................................................................................78

9.3

Enhanced Configuration Register..........................................................................79

9.3.1 Output Driver Control ..............................................................................80

9.3.2 Programming the ECR .............................................................................80

9.4

Read Operations ................................................................................................81

9.4.1 Read Array ............................................................................................81

9.4.2 Read Status Register...............................................................................82

9.4.3 Read Device Information .........................................................................82

9.4.4 CFI Query ..............................................................................................83

9.5

Programming Modes ..........................................................................................83

9.5.1 Control Mode .........................................................................................84

9.5.2 Object Mode ..........................................................................................85

9.6

Programming Operations ....................................................................................88

9.6.1 Single-Word Programming .......................................................................88

9.6.2 Buffered Programming ............................................................................89

9.6.3 Buffered Enhanced Factory Programming (BEFP).........................................90

9.7

Block Erase Operations .......................................................................................92

9.8

Blank Check Operation .......................................................................................93

9.9

Suspend and Resume .........................................................................................93

9.10 Simultaneous Operations ....................................................................................95

9.11 Security ...........................................................................................................95

9.11.1 Block Locking .........................................................................................95

9.11.2 One-Time Programmable (OTP) Registers ..................................................97

9.11.3 Global Main-Array Protection ....................................................................99

9.0

10.0 Device Command Codes

......................................................................................... 100

11.0 Flow Charts............................................................................................................

101

12.0 Common Flash Interface

........................................................................................ 110

12.1 Query Structure Output .................................................................................... 110

12.2 Block Status Register ....................................................................................... 111

Datasheet

April 2008

Order Number: 309823-11

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