Data Sheet
FEATURES
Pretrimmed to ±1.0% (AD532K)
No external components required
Guaranteed ±1.0% maximum 4-quadrant error (AD532K)
Differential inputs for (X
1
− X
2
) (Y
1
− Y
2
)/10 V transfer function
Monolithic construction, low cost
Internally Trimmed
Integrated Circuit Multiplier
AD532
FUNCTIONAL BLOCK DIAGRAM
V
X
X
1
X
2
R
X
Y
1
Y
2
10R
V
OS
00502-003
R
Z
OUTPUT
V
Y
APPLICATIONS
Multiplication, division, squaring, square rooting
Algebraic computation
Power measurements
Instrumentation applications
Available in chip form
(X
1
– X
2
) (Y
1
– Y
2
)
V
OUT
=
10V
(WITH Z TIED TO OUTPUT)
R
Figure 1.
GENERAL DESCRIPTION
The
AD532
is the first pretrimmed, single chip, monolithic
multiplier/divider. It guarantees a maximum multiplying error
of ±1.0% and a ±10 V output voltage without the need for any
external trimming resistors or output op amp. Because the
AD532
is internally trimmed, its simplicity of use provides design
engineers with an attractive alternative to modular multipliers,
and its monolithic construction provides significant advantages
in size, reliability, and economy. Further, the
AD532
can be a
direct replacement for other IC multipliers that require external
trim networks.
GUARANTEED PERFORMANCE OVER
TEMPERATURE
The
AD532J
and
AD532K
are specified for maximum multiplying
errors of ±2% and ±1% of full scale, respectively at 25°C, and
are rated for operation from 0°C to 70°C. The
AD532S
has a
maximum multiplying error of ±1% of full scale at 25°C; it is
also 100% tested to guarantee a maximum error of ±4% at the
extended operating temperature limits of −55°C and +125°C.
All devices are available in either a hermetically sealed TO-100
metal can or 14-lead D-14 side brazed ceramic DIP. The J, K,
and S grade chips are also available.
FLEXIBILITY OF OPERATION
The
AD532
multiplies in four quadrants with a transfer function of
(X
1
− X
2
)(Y
1
− Y
2
)/10 V, divides in two quadrants with a 10 V Z/
(X
1
− X
2
) transfer function, and square roots in one quadrant
with a transfer function of
10
V Z
. In addition to these basic
functions, the differential X and Y inputs provide significant
operating flexibility both for algebraic computation and transducer
instrumentation applications. Transfer functions, such as XY/10 V,
(X
2
− Y
2
)/10 V, ±X
2
/10 V, and 10 V Z/(X
1
− X
2
), are easily attained
and are extremely useful in many modulation and function
generation applications, as well as in trigonometric calculations
for airborne navigation and guidance applications, where the
monolithic construction and small size of the
AD532
offer
considerable system advantages. In addition, the high common-
mode rejection ratio (CMRR) (75 dB) of the differential inputs
makes the
AD532
especially well qualified for instrumentation
applications, as it can provide an output signal that is the product of
two transducer generated input signals.
ADVANTAGES OF ON THE CHIP TRIMMING OF
THE MONOLITHIC
AD532
1.
2.
3.
True ratiometric trim for improved power supply rejection.
Reduced power requirements since no networks across
supplies are required.
More reliable because standard monolithic assembly
techniques can be used rather than more complex hybrid
approaches.
High impedance X and Y inputs with negligible circuit
loading.
Differential X and Y inputs for noise rejection and additional
computational flexibility.
4.
5.
Rev. E
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AD532
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Flexibility of Operation .................................................................... 1
Functional Block Diagram .............................................................. 1
Guaranteed Performance Over Temperature ............................... 1
Advantages of On The Chip Trimming of The Monolithic
AD532 ................................................................................................ 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Thermal Resistance .......................................................................... 5
Chip Dimensions And Bonding Diagram ................................ 5
ESD Caution .................................................................................. 5
Pin Configuration and Function Descriptions ............................. 6
Typical Performance Characteristics ............................................. 7
Data Sheet
Functional Description .....................................................................9
AD532 Performance Characteristics ........................................... 10
Nonlinearity ................................................................................ 10
AC Feedthrough ......................................................................... 10
Common-Mode Rejection ........................................................ 10
Dynamic Characteristics ........................................................... 10
Power Supply Considerations ................................................... 10
Noise Characteristics ................................................................. 10
Applications..................................................................................... 11
Replacing Other IC Multipliers ................................................ 11
Square Root ................................................................................. 12
Difference of Squares ................................................................. 12
Additional Information ............................................................. 12
Outline Dimensions ....................................................................... 13
Ordering Guide .......................................................................... 13
REVISION HISTORY
9/15—Rev. D to Rev. E
Deleted E-20-1 Package ................................................ Throughout
Changes to Guaranteed Performance Over Temperature Section ... 1
Deleted Figure 4; Renumbered Sequentially................................. 6
Deleted Table 4; Renumbered Sequentially .................................. 7
Changes to Figure 14, Figure 15, and Figure 16 ......................... 11
Changes to Figure 17 and Figure 18 ............................................. 12
Added Additional Information Section....................................... 12
Updated Outline Dimensions ....................................................... 13
Changes to Ordering Guide .......................................................... 14
2/11—Rev. C to Rev. D
Updated Format .................................................................. Universal
Added Pin Configuration and Function Descriptions Section .. 6
Added Typical Performance Characteristics Section .................. 8
Changes to Figure 11 ........................................................................ 8
Changes to Figure 12 and Figure 13 ............................................... 9
Changes to Ordering Guide .......................................................... 15
2/01—Revision 0: Initial Version
Rev. E | Page 2 of 14
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