PCA9635 datasheet, PDF - EEWORLD Datasheet

PCA9635

16-bit Fm+ I

2

C-bus LED driver

Rev. 07 — 16 July 2009

Product data sheet

1. General description

The PCA9635 is an I

2

C-bus controlled 16-bit LED driver optimized for

Red/Green/Blue/Amber (RGBA) color mixing applications. Each LED output has its own

8-bit resolution (256 steps) ﬁxed frequency individual PWM controller that operates at

97 kHz with a duty cycle that is adjustable from 0 % to 99.6 % to allow the LED to be set

to a speciﬁc brightness value. An additional 8-bit resolution (256 steps) group PWM

controller has both a ﬁxed frequency of 190 Hz and an adjustable frequency between

24 Hz to once every 10.73 seconds with a duty cycle that is adjustable from 0 % to 99.6 %

that is used to either dim or blink all LEDs with the same value.

Each LED output can be off, on (no PWM control), set at its individual PWM controller

value or at both individual and group PWM controller values. The LED output driver is

programmed to be either open-drain with a 25 mA current sink capability at 5 V or

totem-pole with a 25 mA sink, 10 mA source capability at 5 V. The PCA9635 operates with

a supply voltage range of 2.3 V to 5.5 V and the outputs are 5.5 V tolerant. LEDs can be

directly connected to the LED output (up to 25 mA, 5.5 V) or controlled with external

drivers and a minimum amount of discrete components for larger current or higher voltage

LEDs.

The PCA9635 is one of the ﬁrst LED controller devices in a new Fast-mode Plus (Fm+)

family. Fm+ devices offer higher frequency (up to 1 MHz) and more densely populated bus

operation (up to 4000 pF).

The active LOW Output Enable input pin (OE) allows asynchronous control of the LED

outputs and can be used to set all the outputs to a deﬁned I

2

C-bus programmable logic

state. The OE can also be used to externally PWM the outputs, which is useful when

multiple devices need to be dimmed or blinked together using software control.

Software programmable LED Group and three Sub Call I

2

C-bus addresses allow all or

deﬁned groups of PCA9635 devices to respond to a common I

2

C-bus address, allowing

for example, all red LEDs to be turned on or off at the same time or marquee chasing

effect, thus minimizing I

2

C-bus commands. Seven hardware address pins allow up to

126 devices on the same bus.

The Software Reset (SWRST) Call allows the master to perform a reset of the PCA9635

through the I

2

C-bus, identical to the Power-On Reset (POR) that initializes the registers to

their default state causing the outputs to be set HIGH (LED off). This allows an easy and

quick way to reconﬁgure all device registers to the same condition.

NXP Semiconductors

PCA9635

16-bit Fm+ I

2

C-bus LED driver

2. Features

I

16 LED drivers. Each output programmable at:

N

Off

N

On

N

Programmable LED brightness

N

Programmable group dimming/blinking mixed with individual LED brightness

I

1 MHz Fast-mode Plus compatible I

2

C-bus interface with 30 mA high drive capability

on SDA output for driving high capacitive buses

I

256-step (8-bit) linear programmable brightness per LED output varying from fully off

(default) to maximum brightness using a 97 kHz PWM signal

I

256-step group brightness control allows general dimming (using a 190 Hz PWM

signal) from fully off to maximum brightness (default)

I

256-step group blinking with frequency programmable from 24 Hz to 10.73 s and duty

cycle from 0 % to 99.6 %

I

Sixteen totem-pole outputs (sink 25 mA and source 10 mA at 5 V) with software

programmable open-drain LED outputs selection (default at totem-pole). No input

function.

I

Output state change programmable on the Acknowledge or the STOP Command to

update outputs byte-by-byte or all at the same time (default to ‘Change on STOP’).

I

Active LOW Output Enable (OE) input pin. LED outputs programmable to logic 1,

logic 0 or ‘high-impedance’ (default at power-up) when OE is HIGH, thus allowing

hardware blinking and dimming of the LEDs.

I

7 hardware address pins allow 126 devices to be connected to the same I

2

C-bus

I

4 software programmable I

2

C-bus addresses (one LED Group Call address and three

LED Sub Call addresses) allow groups of devices to be addressed at the same time in

any combination (for example, one register used for ‘All Call’ so that all the PCA9635s

on the I

2

C-bus can be addressed at the same time and the second register used for

three different addresses so that

1

⁄

3

of all devices on the bus can be addressed at the

same time in a group). Software enable and disable for I

2

C-bus address.

I

Software Reset feature (SWRST Call) allows the device to be reset through the

I

2

C-bus

I

25 MHz internal oscillator requires no external components

I

Internal power-on reset

I

Noise ﬁlter on SDA/SCL inputs

I

Edge rate control on outputs

I

No glitch on power-up

I

Supports hot insertion

I

Low standby current

I

Operating power supply voltage range of 2.3 V to 5.5 V

I

5.5 V tolerant inputs

I

−40 °C

to +85

°C

operation

I

ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per

JESD22-A115 and 1000 V CDM per JESD22-C101

I

Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA

I

Packages offered: TSSOP28

PCA9635_7

Product data sheet

Rev. 07 — 16 July 2009

2 of 35

NXP Semiconductors

PCA9635

16-bit Fm+ I

2

C-bus LED driver

3. Applications

I

RGB or RGBA LED drivers

LED status information

LED displays

LCD backlights

Keypad backlights for cellular phones or handheld devices

4. Ordering information

Table 1.

Ordering information

Topside

mark

Package

Name

Description

plastic thin shrink small outline package; 28 leads;

body width 4.4 mm

plastic thin shrink small outline package; 28 leads;

body width 4.4 mm

Version

SOT361-1

Type number

PCA9635PW

PCA9635PW/Q900

[1]

PCA9635PW TSSOP28

[1]

PCA9635PW/Q900 is AEC-Q100 compliant. Contact

i2c.support@nxp.com

for PPAP.

5. Block diagram

A0

A1

A2

A3

A4

A5

A6

SCL

SDA

INPUT FILTER

PCA9635

I

2

C-BUS

CONTROL

V

DD

V

SS

POWER-ON

RESET

LED

STATE

SELECT

REGISTER

PWM

REGISTER X

BRIGHTNESS

CONTROL

V

DD

LEDn

97 kHz

25 MHz

OSCILLATOR

24.3 kHz

GRPFREQ

REGISTER

MUX/

CONTROL

GRPPWM

REGISTER

'0' – permanently OFF

'1' – permanently ON

190 Hz

OE

002aac136

Remark:

Only one LED output shown for clarity.

Fig 1.

PCA9635_7

Block diagram of PCA9635

Product data sheet

Rev. 07 — 16 July 2009

3 of 35

NXP Semiconductors

PCA9635

16-bit Fm+ I

2

C-bus LED driver

6. Pinning information

6.1 Pinning

A0

A1

A2

A3

A4

LED0

LED1

LED2

LED3

1

2

3

4

5

6

7

8

9

28 V

DD

27 SDA

26 SCL

25 A6

24 A5

23 OE

22 LED15

21 LED14

20 LED13

19 LED12

18 LED11

17 LED10

16 LED9

15 LED8

002aac134

PCA9635PW

PCA9635PW/Q900

LED4 10

LED5 11

LED6 12

LED7 13

V

SS

14

Fig 2.

Pin conﬁguration for TSSOP28

6.2 Pin description

Table 2.

Symbol

A0

A1

A2

A3

A4

LED0

LED1

LED2

LED3

LED4

LED5

LED6

LED7

V

SS

LED8

LED9

LED10

LED11

LED12

PCA9635_7

Pin description

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

Type

I

O

power supply

O

Description

address input 0

address input 1

address input 2

address input 3

address input 4

LED driver 0

LED driver 1

LED driver 2

LED driver 3

LED driver 4

LED driver 5

LED driver 6

LED driver 7

supply ground

LED driver 8

LED driver 9

LED driver 10

LED driver 11

LED driver 12

Product data sheet

Rev. 07 — 16 July 2009

4 of 35

NXP Semiconductors

PCA9635

16-bit Fm+ I

2

C-bus LED driver

Pin description

…continued

20

21

22

23

24

25

26

27

28

Type

O

I

I/O

power supply

Description

LED driver 13

LED driver 14

LED driver 15

active LOW output enable

address input 5

address input 6

serial clock line

serial data line

supply voltage

Table 2.

Symbol

LED13

LED14

LED15

OE

A5

A6

SCL

SDA

V

DD

7. Functional description

Refer to

Figure 1 “Block diagram of PCA9635”.

7.1 Device addresses

Following a START condition, the bus master must output the address of the slave it is

accessing.

There are a maximum of 128 possible programmable addresses using the 7 hardware

address pins. Two of these addresses, Software Reset and LED All Call, cannot be used

because their default power-up state is ON, leaving a maximum of 126 addresses. Using

other reserved addresses, as well as any other Sub Call address, will reduce the total

number of possible addresses even further.

7.1.1 Regular I

2

C-bus slave address

The I

2

C-bus slave address of the PCA9635 is shown in

Figure 3.

To conserve power, no

internal pull-up resistors are incorporated on the hardware selectable address pins and

they must be pulled HIGH or LOW.

Remark:

Using reserved I

2

C-bus addresses will interfere with other devices, but only if the

devices are on the bus and/or the bus will be open to other I

2

C-bus systems at some later

date. In a closed system where the designer controls the address assignment these

addresses can be used since the PCA9635 treats them like any other address. The

LED All Call, Software Rest and PCA9564 or PCA9665 slave address (if on the bus) can

never be used for individual device addresses.

•

PCA9635 LED All Call address (1110 000) and Software Reset (0000 0110) which

are active on start-up

•

PCA9564 (0000 000) or PCA9665 (1110 000) slave address which is active on

start-up

•

PCA9635_7

‘reserved for future use’ I

2

C-bus addresses (0000 011, 1111 1XX)

slave devices that use the 10-bit addressing scheme (1111 0XX)

slave devices that are designed to respond to the General Call address (0000 000)

High-speed mode (Hs-mode) master code (0000 1XX)

Product data sheet

Rev. 07 — 16 July 2009

5 of 35

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