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IDT71256S25TDB

Description
Standard SRAM, 32KX8, 25ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28
Categorystorage    storage   
File Size106KB,10 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric View All

IDT71256S25TDB Overview

Standard SRAM, 32KX8, 25ns, CMOS, CDIP28, 0.300 INCH, CERAMIC, DIP-28

IDT71256S25TDB Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeDIP
package instructionDIP, DIP28,.6
Contacts28
Reach Compliance Codenot_compliant
ECCN code3A001.A.2.C
Maximum access time25 ns
I/O typeCOMMON
JESD-30 codeR-GDIP-T28
JESD-609 codee0
length37.1475 mm
memory density262144 bit
Memory IC TypeSTANDARD SRAM
memory width8
Number of functions1
Number of ports1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize32KX8
Output characteristics3-STATE
ExportableYES
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDIP
Encapsulate equivalent codeDIP28,.6
Package shapeRECTANGULAR
Package formIN-LINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)225
power supply5 V
Certification statusNot Qualified
Filter levelMIL-STD-883 Class B
Maximum seat height5.08 mm
Maximum standby current0.02 A
Minimum standby current4.5 V
Maximum slew rate0.15 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountNO
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperature20
width7.62 mm
Base Number Matches1
CMOS Static RAM
256K (32K x 8-Bit)
Features
High-speed address/chip select time
– Military: 25/35/45/55/70/85/100ns (max.)
– Industrial: 25/35ns (max.)
– Commercial: 20/25/35ns (max.) low power only
Low-power operation
Battery Backup operation – 2V data retention
Produced with advanced high-performance CMOS
technology
Input and output directly TTL-compatible
Available in standard 28-pin (300 or 600 mil) ceramic DIP,
28-pin (600 mil) plastic DIP, 28-pin (300 mil) SOJ and
32-pin LCC
Military product compliant to MIL-STD-883, Class B
IDT71256S
IDT71256L
Description
The IDT 71256 is a 262,144-bit high-speed static RAM organized as
32K x 8. It is fabricated using IDT's high-performance, high-reliability
CMOS technology.
Address access times as fast as 20ns are available with power
consumption of only 350mW (typ.). The circuit also offers a reduced power
standby mode. When
CS
goes HIGH, the circuit will automatically go to and
remain in, a low-power standby mode as long as
CS
remains HIGH. In
the full standby mode, the low-power device consumes less than 15µW,
typically. This capability provides significant system level power and
cooling savings. The low-power (L) version also offers a battery backup
data retention capability where the circuit typically consumes only 5µW
when operating off a 2V battery.
The IDT71256 is packaged in a 28-pin (300 or 600 mil) ceramic DIP,
a 28-pin 300 mil SOJ, a 28-pin (600 mil) plastic DIP, and a 32-pin LCC
providing high board level packing densities.
The IDT71256 military RAM is manufactured in compliance with the
latest revision of MIL-STD-883, Class B, making it ideally suited to military
temperature applications demanding the highest level of performance and
reliability.
x
x
x
x
x
x
x
Functional Block Diagram
A
0
ADDRESS
DECODER
A
14
262,144 BIT
MEMORY ARRAY
V
CC
GND
I/O
0
INPUT
DATA
CIRCUIT
I/O
7
I/O CONTROL
CS
OE
WE
,
CONTROL
CIRCUIT
2946 drw 01
FEBRUARY 2001
1
©2000 Integrated Device Technology, Inc.
DSC-2946/9
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