EEWORLDEEWORLDEEWORLD

Part Number

Search

854S14AKILF

Description
Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220, VQFN-24
Categorylogic    logic   
File Size289KB,14 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance
Download Datasheet Parametric Compare View All

854S14AKILF Overview

Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220, VQFN-24

854S14AKILF Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeQFN
package instructionHVQCCN, LCC24,.16SQ,20
Contacts24
Reach Compliance Codecompliant
ECCN codeEAR99
series854S
Input adjustmentDIFFERENTIAL
JESD-30 codeS-XQCC-N24
JESD-609 codee3
length4 mm
Logic integrated circuit typeLOW SKEW CLOCK DRIVER
Humidity sensitivity level3
Number of functions1
Number of inverted outputs
Number of terminals24
Actual output times4
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeHVQCCN
Encapsulate equivalent codeLCC24,.16SQ,20
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
power supply2.5 V
Certification statusNot Qualified
Maximum seat height1 mm
Maximum supply voltage (Vsup)2.625 V
Minimum supply voltage (Vsup)2.375 V
Nominal supply voltage (Vsup)2.5 V
surface mountYES
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn) - annealed
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width4 mm
Base Number Matches1
PRELIMINARY
LOW SKEW, 1-TO-4 DIFFERENTIAL-TO-
LVDS FANOUT BUFFER
ICS854S14I
G
ENERAL
D
ESCRIPTION
The ICS854S14I is a high speed 1-to-4 Differential-
to-LVDS Fanout Buffer and is a member of the
HiPerClockS™
HiPerClockS™ family of high performance clock
solutions from IDT. The ICS854S14I is optimized
for high speed and very low output skew, making
it suitable for use in demanding applications such as SONET,
1 Gigabit and 10 Gigabit Ethernet, and Fibre Channel. The
internally terminated differential input and V
REF
_
AC
pin allow
other differential signal families such as LVPECL, LVDS, and
SSTL to be easily interfaced to the input with minimal use of
external components. The device also has output enable pins
which may be useful for system test and debug purposes.
F
EATURES
Four differential LVDS outputs
IN, nIN pair can accept the following differential input levels:
LVPECL, LVDS, SSTL
50Ω internal input termination to V
T
Output frequency: 1.5GHz
Output skew: 30ps (typical)
Part-to-part skew: TBD
Additive phase jitter, RMS: 0.135ps (typical)
Propagation delay: 1.1ns (typical)
2.5V operating supply
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
IC
S
A
PPLICATIONS
:
Processor clock distribution
622MHz central office clock distribution
High speed network routing
Wireless basestations
Serdes LVPECL output to FPGA LVDS input translator
Fibre channel clock distribution
AMC clock driver for ATCA systems
Gigabit ethernet clock distibution
B
LOCK
D
IAGRAM
OE0
Q0
nQ0
OE1
IN
50Ω
P
IN
A
SSIGNMENT
GND
OE0
OE1
OE2
OE3
24 23 22 21 20 19
GND
Q0
nQ0
1
2
3
4
5
6
7
8
nIN
V
DD
18
17
16
15
14
13
9 10 11 12
V
REF
_
AC
GND
VT
IN
V
DD
V
DD
Q3
nQ3
nQ2
Q2
GND
Q1
nQ1
50Ω
nQ1
Q1
V
DD
V
T
nIN
OE2
Q2
V
REF_AC
OE3
Q3
nQ3
nQ2
ICS854S14I
24-Lead VFQFN
4mm x 4mm x 0.95 package body
K Package
Top View
The Preliminary Information presented herein represents a product in pre-production. The noted characteristics are based on initial product characterization
and/or qualification. Integrated Device Technology, Incorporated (IDT) reserves the right to change any circuitry or specifications without notice.
IDT
/ ICS
LVDS FANOUT BUFFER
1
ICS854S14AKI REV. A FEBRUARY 23, 2007

854S14AKILF Related Products

854S14AKILF 854S14AKILFT 854S14AKT 854S14AKI
Description Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220, VQFN-24 Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95 MM HEIGHT, ROHS COMPLIANT, MO-220, VQFN-24 Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95 MM HEIGHT, MO-220, VQFN-24 Low Skew Clock Driver, 854S Series, 4 True Output(s), 0 Inverted Output(s), 4 X 4 MM, 0.95 MM HEIGHT, MO-220, VQFN-24
Is it lead-free? Lead free Lead free Contains lead Contains lead
Is it Rohs certified? conform to conform to incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code QFN QFN QFN QFN
package instruction HVQCCN, LCC24,.16SQ,20 HVQCCN, LCC24,.16SQ,20 HVQCCN, LCC24,.16SQ,20 HVQCCN, LCC24,.16SQ,20
Contacts 24 24 24 24
Reach Compliance Code compliant compliant not_compliant not_compliant
series 854S 854S 854S 854S
Input adjustment DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL
JESD-30 code S-XQCC-N24 S-XQCC-N24 S-XQCC-N24 S-XQCC-N24
JESD-609 code e3 e3 e0 e0
length 4 mm 4 mm 4 mm 4 mm
Logic integrated circuit type LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
Number of functions 1 1 1 1
Number of terminals 24 24 24 24
Actual output times 4 4 4 4
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE
Package body material UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code HVQCCN HVQCCN HVQCCN HVQCCN
Encapsulate equivalent code LCC24,.16SQ,20 LCC24,.16SQ,20 LCC24,.16SQ,20 LCC24,.16SQ,20
Package shape SQUARE SQUARE SQUARE SQUARE
Package form CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260 225 225
power supply 2.5 V 2.5 V 2.5 V 2.5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 1 mm 1 mm 1 mm 1 mm
Maximum supply voltage (Vsup) 2.625 V 2.625 V 2.625 V 2.625 V
Minimum supply voltage (Vsup) 2.375 V 2.375 V 2.375 V 2.375 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V
surface mount YES YES YES YES
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) - annealed Matte Tin (Sn) - annealed Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location QUAD QUAD QUAD QUAD
Maximum time at peak reflow temperature 30 30 30 30
width 4 mm 4 mm 4 mm 4 mm

Technical ResourceMore

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1969  1709  410  2707  1184  40  35  9  55  24 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号