a
FEATURES
High DC Precision
75 V max Offset Voltage
1 V/ C max Offset Voltage Drift
150 pA max Input Bias Current
0.2 pA/ C typical I
B
Drift
Low Noise
0.5 V p-p typical Noise, 0.1 Hz to 10 Hz
Low Power
600 A max Supply Current per Amplifier
Chips & MIL-STD-883B Processing Available
Available in Tape and Reel in Accordance
with EIA-481A Standard
Single Version: AD705, Dual Version: AD706
PRIMARY APPLICATIONS
Industrial/Process Controls
Weigh Scales
ECG/EKG Instrumentation
Low Frequency Active Filters
Quad Picoampere Input Current
Bipolar Op Amp
AD704
CONNECTION DIAGRAMS
14-Pin Plastic DIP (N)
14-Pin Cerdip (Q) Packages
OUTPUT
–IN
+ IN
+V
S
+ IN
–IN
OUTPUT
1
2
3
4
5
6
7
2
3
1
4
14
13
12
OUTPUT
–IN
+ IN
–V
S
+ IN
–IN
OUTPUT
OUTPUT
–IN
+ IN
+V
S
+ IN
–IN
OUTPUT
NC
1
2
3
4
5
6
7
8
NC = NO CONNECT
2
3
1
4
16-Pin SOIC
(R) Package
16
15
14
OUTPUT
–IN
+ IN
–V
S
+ IN
–IN
OUTPUT
NC
AD704
(TOP VIEW)
11
10
9
8
AD704
(TOP VIEW)
13
12
11
10
9
(E) Package 20-Terminal LCC
OUT1
OUT4
–IN1
NC
–IN4
3
2
1
20
19
PRODUCT DESCRIPTION
The AD704 is a quad, low power bipolar op amp that has the
low input bias current of a BiFET amplifier but which offers a
significantly lower I
B
drift over temperature. It utilizes Super-
beta bipolar input transistors to achieve picoampere input bias
current levels (similar to FET input amplifiers at room tempera-
ture), while its I
B
typically only increases by 5× at +125°C
(unlike a BiFET amp, for which I
B
doubles every 10°C resulting
in a 1000× increase at +125°C). Furthermore the AD704
achieves 75
µV
offset voltage and low noise characteristics of a
precision bipolar input op amp.
100
+IN1 4
NC 5
+V
S
6
NC 7
+IN2 8
AMP 1
AMP 4
18 +IN4
17 NC
16 –V
S
15 NC
14 +IN3
AD704
AMP 2
AMP 3
9
–IN2
10
OUT2
11
NC
12
OUT3
13
–IN3
NC = NO CONNECT
10
TYPICAL I
B
– nA
TYPICAL JFET AMP
1
Since it has only 1/20 the input bias current of an AD OP07, the
AD704 does not require the commonly used “balancing”
resistor. Furthermore, the current noise is 1/5 that of the
AD OP07 which makes the AD704 usable with much higher
source impedances. At 1/6 the supply current (per amplifier) of
the AD OP07, the AD704 is better suited for today’s higher
density circuit boards and battery powered applications.
The AD704 is an excellent choice for use in low frequency
active filters in 12- and 14-bit data acquisition systems, in
precision instrumentation, and as a high quality integrator. The
AD704 is internally compensated for unity gain and is available
in five performance grades. The AD704J and AD704K are rated
over the commercial temperature range of 0°C to +70°C. The
AD704A and AD704B are rated over the industrial temperature
of –40°C to +85°C. The AD704T is rated over the military
temperature range of –55°C to +125°C and is available
processed to MIL-STD-883B, Rev. C.
0.1
AD704T
0.01
–55
+25
TEMPERATURE –
°C
+125
Figure 1. Input Bias Current Over Temperature
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
AD704–SPECIFICATIONS
(@ T = +25 C, V
A
CM
= 0 V, and
15 V dc, unless otherwise noted)
AD704K/B
Min Typ Max
30
50
0.2
132
126
0.3
80
0.2
75
150
1.0
112
108
150
200
200
300
30
0.4
80
80
100
150
200
300
130
200
300
400
110
104
110
106
104
104
110
106
150
150
50
0.4
80
100
AD704T
Min Typ Max
30
80
132
126
0.3
80
1.0
600
700
150
200
400
500
150
250
400
600
200
250
100
150
1.0
Units
µV
µV
µV/°C
dB
dB
µV/month
pA
pA
pA/°C
pA
pA
pA
pA
pA/°C
pA
pA
µV
µV
pA
pA
dB
dB
dB
dB
dB
Model
Conditions
INPUT OFFSET VOLTAGE
Initial Offset
Offset
vs. Temp, Average TC
vs. Supply (PSRR)
T
MIN
–T
MAX
Long Term Stability
INPUT BIAS CURRENT
1
vs. Temp, Average TC
T
MIN
–T
MAX
T
MIN
–T
MAX
INPUT OFFSET CURRENT
vs. Temp, Average TC
T
MIN
–T
MAX
T
MIN
–T
MAX
MATCHING CHARACTERISTICS
Offset Voltage
T
MIN
–T
MAX
Input Bias Current
2
AD704J/A
Min Typ Max
50
100
0.2
132
126
0.3
100
0.3
150
250
1.5
T
MIN
–T
MAX
100
V
S
=
±
2 to
±
18 V
V
S
=
±
2.5 to
±
18 V 100
V
CM
= 0 V
V
CM
=
±
13.5 V
V
CM
= 0 V
V
CM
=
±
13.5 V
V
CM
= 0 V
V
CM
=
±
13.5 V
V
CM
= 0 V
V
CM
=
±
13.5 V
112
108
270
300
300
400
80
0.6
100
100
250
300
300
400
250
400
500
600
T
MIN
–T
MAX
Common-Mode Rejection
3
T
MIN
–T
MAX
Power Supply Rejection
Crosstalk
5
4
T
MIN
–T
MAX
f = 10 Hz
R
LOAD
= 2 kΩ
94
94
94
94
150
FREQUENCY RESPONSE
UNITY GAIN
Crossover Frequency
Slew Rate, Unity Gain
Slew Rate
INPUT IMPEDANCE
Differential
Common-Mode
INPUT VOLTAGE RANGE
Common-Mode Voltage
Common-Mode Rejection Ratio
INPUT CURRENT NOISE
INPUT VOLTAGE NOISE
G = –1
T
MIN
–T
MAX
0.8
0.15
0.1
40 2
300 2
±
13.5
±
14
100 132
98
128
3
50
0.5
17
15
200
150
200
150
2000
1500
1000
1000
0.8
0.15
0.1
40 2
300 2
±
13.5
±
14
114 132
108 128
3
50
0.5
17
15
400
300
300
200
2000
1500
1000
1000
2.0
22
400
300
200
100
0.8
0.15
0.1
40 2
300 2
±
13.5
±
14
110 132
108 128
3
50
0.5
17
15
2000
1500
1000
1000
2.0
22
MHz
V/µs
V/µs
MΩ pF
GΩ pF
V
dB
dB
pA p-p
fA/√Hz
µV
p-p
nV/√Hz
nV/√Hz
V/mV
V/mV
V/mV
V/mV
V
CM
=
±
13.5 V
T
MIN
–T
MAX
0.1 to 10 Hz
f = 10 Hz
0.1 to 10 Hz
f = 10 Hz
f = 1 kHz
V
O
=
±
12 V
R
LOAD
= 10 kΩ
T
MIN
–T
MAX
V
O
=
±
10 V
R
LOAD
= 2 kΩ
T
MIN
–T
MAX
22
OPEN-LOOP GAIN
–2–
REV. A
AD704
Model
Conditions
OUTPUT CHARACTERISTICS
Voltage Swing
Current
CAPACITIVE LOAD
Drive Capability
POWER SUPPLY
Rated Performance
Operating Range
Quiescent Current
T
MIN
–T
MAX
TRANSISTOR COUNT
# of Transistors
R
LOAD
= 10 kΩ
T
MIN
–T
MAX
Short Circuit
Gain = + 1
AD704J/A
Min Typ Max
AD704K/B
Min Typ Max
Min
AD704T
Typ Max
Units
±
13
±
14
±
15
10,000
±
15
1.5
1.6
180
±
13
±
14
±
15
10,000
±
15
1.5
1.6
180
±
13
±
14
±
15
10,000
±
15
1.5
1.6
180
V
mA
pF
V
V
mA
mA
±
2.0
±
18
2.4
2.6
±
2.0
±
18
2.4
2.6
±
2.0
±
18
2.4
2.6
NOTES
1
Bias current specifications are guaranteed maximum at either input.
2
Input bias current match is the maximum difference between corresponding inputs of all four amplifiers.
3
CMRR match is the difference of
∆V
OS
/∆V
CM
between any two amplifiers, expressed in dB.
4
PSRR match is the difference between
∆V
OS
/∆V
SUPPLY
for any two amplifiers, expressed in dB.
5
See Figure 2a for test circuit.
All min and max specifications are guaranteed.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
1
METALIZATION PHOTOGRAPH
Dimensions shown in inches and (mm).
Contact factory for latest dimensions.
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
18 V
Internal Power Dissipation (+25°C) . . . . . . . . . . . See Note 2
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
±
V
S
Differential Input Voltage
3
. . . . . . . . . . . . . . . . . . . . . . .
±
0.7 V
Output Short Circuit Duration (Single Input) . . . . . Indefinite
Storage Temperature Range
(Q) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +150°C
(N, R) . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to +125°C
Operating Temperature Range
AD704J/K . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
AD704A/B . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
AD704T . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Lead Temperature Range (Soldering 10 seconds) . . . . +300°C
NOTES
1
Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in
the operational section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
2
Specification is for device in free air:
14-Pin Plastic Package:
θ
JA
= 150°C/Watt
14-Pin Cerdip Package:
θ
JA
= 110°C/Watt
16-Pin SOIC Package:
θ
JA
= 100°C/Watt
20-Terminal LCC Package:
θ
JA
= 150°C/Watt
3
The input pins of this amplifier are protected by back-to-back diodes. If the
differential voltage exceeds
±
0.7 volts, external series protection resistors should
be added to limit the input current to less than 25 mA.
9k
Ω
1k
Ω
–80
AMP4
–100
CROSSTALK – dB
AMP2
AMP3
–120
INPUT
*
SIGNAL
1k
Ω
1/4
AD704
OUTPUT
+V
S
2.5k
Ω
0.1 µF
COM
0.1 µF
–V
S
1µF
1µF
AD704
PIN 4
–140
AD704
PIN 11
–160
10
100
1k
FREQUENCY – Hz
10k
100k
ALL 4 AMPLIFIERS ARE CONNECTED AS SHOWN
INPUT (SUCH THAT
AMPLIFIER'S OUTPUT IS AT MAX
*
THE SIGNAL WITHOUT CLIPPING THESLEW LIMITING) IS APPLIED TO ONE
AMPLITUDE
OR
AMPLIFIER AT A TIME. THE OUTPUTS OF THE OTHER THREE AMPLIFIERS ARE
THEN MEASURED FOR CROSSTALK.
Figure 2b. Crosstalk vs. Frequency
Figure 2a. Crosstalk Test Circuit
REV. A
–3–
AD704–Typical Characteristics
(@ +25 C, V =
S
15 V, unless otherwise noted)
ORDERING GUIDE
Model
AD704JN
AD704JR
AD704JR-/REEL
AD704KN
AD704AN
AD704AQ
AD704AR
AD704AR-REEL
AD704BQ
AD704SE/883B
AD704TQ
AD704TQ/883B
Temperature Range
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
–55°C to +125°C
–55°C to +125°C
Package Option*
N-14
R-16
Tape and Reel
N-14
N-14
Q-14
R-16
Tape and Reel
Q-14
E-20A
Q-14
Q-14
Chips are also available.
*E = Leadless Ceramic Chip Carrier; N = Plastic DIP; Q = Cerdip;
R = Small Outline (SOIC).
50
50
50
PERCENTAGE OF UNITS
PERCENTAGE OF UNITS
30
30
PERCENTAGE OF UNITS
–80
+160
40
40
40
30
20
20
20
10
10
10
0
–80
–40
0
+40
+80
INPUT OFFSET VOLTAGE –
µV
0
–160
0
+80
INPUT BIAS CURRENT – pA
0
–120
–60
0
+60
+120
INPUT OFFSET CURRENT – pA
Figure 3. Typical Distribution of
Input Offset Voltage
Figure 4. Typical Distribution of
Input Bias Current
Figure 5. Typical Distribution of
Input Offset Current
INPUT COMMON-MODE VOLTAGE LIMIT – Volts
(REFERRED TO SUPPLY VOLTAGES)
+V
S
–0.5
–1.0
–1.5
35
30
25
20
15
10
5
0
100
OFFSET VOLTAGE DRIFT –
µV/°C
OUTPUT VOLTAGE – Volts p-p
SOURCE RESISTANCE
MAY BE EITHER BALANCED
OR UNBALANCED
10
+1.5
+1.0
+0.5
–V
S
0
5
10
15
20
SUPPLY VOLTAGE – Volts
1.0
0.1
1k
10k
100k
FREQUENCY – Hz
1M
1k
10k
100k
1M
10M
100M
SOURCE RESISTANCE –
Ω
Figure 6. Input Common-Mode
Voltage Range vs. Supply Voltage
Figure 7. Large Signal Frequency
Response
Figure 8. Offset Voltage Drift vs.
Source Resistance
–4–
REV. A
AD704
50
CHANGE IN OFFSET VOLTAGE –
µV
4
120
100
3
INPUT BIAS CURRENT – pA
PERCENTAGE OF UNITS
40
80
POSITIVE I
B
60
30
2
20
40
NEGATIVE I
B
20
1
10
0
–0.8
–0.4
0
+0.4
+0.8
INPUT OFFSET VOLTAGE DRIFT –
µV/°C
0
0
1
2
3
4
5
WARM-UP TIME – Minutes
0
–15
–10
–5
0
5
10
15
COMMON MODE VOLTAGE – Volts
Figure 9. Typical Distribution of
Offset Voltage Drift
Figure 10. Change in Input Off-
set Voltage vs. Warm-Up Time
Figure 11. Input Bias Current vs.
Common-Mode Voltage
1000
1000
VOLTAGE NOISE – nV/ Hz
CURRENT NOISE – fA/
100
Hz
100
10
10
100Ω
20MΩ
10kΩ
V
OUT
1
1
10
100
FREQUENCY – Hz
1000
1
1
10
100
1000
FREQUENCY – Hz
Figure 12. Input Noise Voltage
Spectral Density
Figure 13. Input Noise Current
Spectral Density
Figure 14. 0.1 Hz to 10 Hz Noise
Voltage
500
+160
+140
180
160
V
S
=
±15V
T
A
= +25°C
QUIESCENT CURRENT –
µA
450
FIGURE 15
CMR – dB
+120
V
S
=
±
15V
+100
+80
+60
+40
140
120
100
–PSR
80
+PSR
60
40
400
+125°C
+25°C
350
–55°C
300
0
5
10
15
20
+20
0
0.1
PSR – dB
1
10
1k
10k
FREQUENCY – Hz
100
100k 1M
20
0.1
1
10
SUPPLY VOLTAGE –
±Volts
100
1k
10k
FREQUENCY – Hz
100k 1M
Figure 15. Quiescent Supply
Current vs. Supply Voltage (per
Amplifier)
Figure 16. Common-Mode
Rejection vs. Frequency
Figure 17. Power Supply Rejection
vs. Frequency
REV. A
–5–
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