C1 : Electrolytic type with good temperature and frequency
characteristics
(Note : The capacitance value depends on the PWM control
scheme used in the applied system).
C2 : 0.22~2µF R-category ceramic capacitor for noise filtering.
High-side input (PWM)
(3V, 5V line) (Note 1, 2)
Input signal
conditioning
Level shifter
Protection
circuit (UV)
Input signal
conditioning
Level shifter
Input signal
conditioning
Level shifter
C2
C1
(Note 6)
(Note 5)
Inrush current
limiter circuit
P
Drive circuit
Drive circuit
Drive circuit
H-side IGBT
S
DIPIPM
AC line input
(Note 4)
U
V
W
(Note 7)
M
AC line output
Z
C
V
NC
N1
N
L-side IGBT
S
CIN
Z : Surge absorber
C : AC filter (Ceramic capacitor 2.2~6.5nF)
(Note : Additionally, an appropriate line-to line
surge absorber circuit may become necessary
depending on the application environment).
Drive circuit
Input signal conditioning
Fo logic
Protection
Control supply
circuit
Under-Voltage
protection
Low-side input (PWM) F
O
(3V, 5V line)(Note 1, 2) Fault output (5V line)
(Note 3)
(Note 6)
V
NC
V
D
(15V line)
Note1:
2:
3:
4:
5:
6:
7:
Input logic is high-active. There is a 3.3kΩ (min) pull-down resistor built-in each input circuit. When using an external CR filter, please make it satisfy the
input threshold voltage.
By virtue of integrating an application specific type HVIC inside the module, direct coupling to MCU terminals without any opto-coupler or transformer
isolation is possible. (see also Fig. 11)
This output is open drain type. The signal line should be pulled up to the positive side of the 5V power supply with approximately 10kΩ resistor.
(see also Fig. 11)
The wiring between the power DC link capacitor and the P, N1 terminals should be as short as possible to protect the DIPIPM against catastrophic high
surge voltages. For extra precaution, a small film type snubber capacitor (0.1~0.22µF, high voltage type) is recommended to be mounted close to
these P & N1 DC power input pins.
High voltage (600V or more) and fast recovery type (less than 100ns) diodes should be used in the bootstrap circuit.
It is recommended to insert a Zener diode (24V/1W) between each pair of control supply terminals to prevent surge destruction.
Bootstrap negative electrodes should be connected to U, V, W terminals directly and separated from the main output wires.
Mar. 2009
3
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21962-T/-AT/-CT/-TW
TRANSFER-MOLD TYPE
INSULATED TYPE
Fig. 6 EXTERNAL PART OF THE DIPIPM PROTECTION CIRCUIT
DIPIPM
Drive circuit
P
Short Circuit Protective Function (SC) :
SC protection is achieved by sensing the L-side DC-Bus current (through the external
shunt resistor) after allowing a suitable filtering time (defined by the RC circuit).
When the sensed shunt voltage exceeds the SC trip-level, all the L-side IGBTs are turned
OFF and a fault signal (Fo) is output. Since the SC fault may be repetitive, it is
recommended to stop the system when the Fo signal is received and check the fault.
I
C
(A)
SC Protection
Trip Level
H-side IGBT
S
U
V
W
L-side IGBT
S
External protection circuit
N1
Shunt Resistor
(Note 1)
A
N
V
NC
CIN
B
Drive circuit
Collector current
waveform
C R
C
Protection circuit
(Note 2)
0
2
t
w
(µs)
Note1:
In the recommended external protection circuit, please select the RC time constant in the range 1.5~2.0µs.
2:
To prevent erroneous protection operation, the wiring of A, B, C should be as short as possible.
MAXIMUM RATINGS
(T
j
= 25°C, unless otherwise noted)
INVERTER PART
Symbol
V
CC
V
CC(surge)
V
CES
±I
C
±I
CP
P
C
T
j
Parameter
Supply voltage
Supply voltage (surge)
Collector-emitter voltage
Each IGBT collector current
Each IGBT collector current (peak)
Collector dissipation
Junction temperature
Condition
Applied between P-N
Applied between P-N
T
C
= 25°C
T
C
= 25°C, less than 1ms
T
C
= 25°C, per 1 chip
(Note 1)
Ratings
450
500
600
5
10
21.3
–20~+125
Unit
V
V
V
A
A
W
°C
Note 1 :
The maximum junction temperature rating of the power chips integrated within the DIPIPM is 150°C (@ T
C
≤
100°C). However, to en-
sure safe operation of the DIPIPM, the average junction temperature should be limited to T
j(ave)
≤
125°C (@ T
C
≤
100°C).
CONTROL (PROTECTION) PART
Symbol
V
D
V
DB
V
IN
V
FO
I
FO
V
SC
Parameter
Control supply voltage
Control supply voltage
Input voltage
Fault output supply voltage
Fault output current
Current sensing input voltage
Condition
Applied between V
P1
-V
NC
, V
N1
-V
NC
Applied between V
UFB
-U, V
VFB
-V, V
WFB
-W
Applied between U
P
, V
P
, W
P
, U
N
, V
N
,
W
N
-V
NC
Applied between F
O
-V
NC
Sink current at F
O
terminal
Applied between CIN-V
NC
Ratings
20
20
–0.5~V
D
+0.5
–0.5~V
D
+0.5
1
–0.5~V
D
+0.5
Unit
V
V
V
V
mA
V
Mar. 2009
4
MITSUBISHI SEMICONDUCTOR <Dual-In-Line Package Intelligent Power Module>
PS21962-T/-AT/-CT/-TW
TRANSFER-MOLD TYPE
INSULATED TYPE
TOTAL SYSTEM
Parameter
Self protection supply voltage limit
V
CC(PROT)
(short circuit protection capability)
Module case operation temperature
T
C
Storage temperature
T
stg
V
iso
Isolation voltage
Symbol
Condition
V
D
= 13.5~16.5V, Inverter part
T
j
= 125°C, non-repetitive, less than 2µs
(Note 2)
60Hz, Sinusoidal, 1 minute,
Between pins and heat-sink plate
Ratings
400
–20~+100
–40~+125
1500
Unit
V
°C
°C
V
rms
Note 2:
T
C
measurement point
Control terminals
11.6mm
3mm
IGBT chip position
FWD chip position
Power terminals
T
C
point
Heat sink side
THERMAL RESISTANCE
Symbol
R
th(j-c)Q
R
th(j-c)F
Parameter
Junction to case thermal
resistance
(Note 3)
Condition
Inverter IGBT part (per 1/6 module)
Inverter FWD part (per 1/6 module)
Min.
—
—
Limits
Typ.
—
—
Max.
4.7
5.4
Unit
°C/W
°C/W
Note 3 :
Grease with good thermal conductivity should be applied evenly with about +100µm~+200µm on the contacting surface of DIPIPM and
heat-sink.
The contacting thermal resistance between DIPIPM case and heat sink (R
th(c-f)
) is determined by the thickness and the thermal con-
ductivity of the applied grease. For reference, R
th(c-f)
(per 1/6 module) is about 0.3°C/W when the grease thickness is 20µm and
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