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74AVC16T245DGV,112

Description
74AVC16T245 - 16-bit dual supply translating transceiver with configurable voltage translation; 3-state TSSOP 48-Pin
Categorylogic    logic   
File Size300KB,22 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
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74AVC16T245DGV,112 Overview

74AVC16T245 - 16-bit dual supply translating transceiver with configurable voltage translation; 3-state TSSOP 48-Pin

74AVC16T245DGV,112 Parametric

Parameter NameAttribute value
Brand NameNexperia
Is it Rohs certified?conform to
MakerNexperia
Parts packaging codeTSSOP
package instructionTSSOP-48
Contacts48
Manufacturer packaging codeSOT480-1
Reach Compliance Codecompliant
Samacsys Description74AVC16T245 - 16-bit dual supply translating transceiver@en-us
seriesAVC
JESD-30 codeR-PDSO-G48
JESD-609 codee4
length9.7 mm
Logic integrated circuit typeBUS TRANSCEIVER
Humidity sensitivity level1
Number of digits8
Number of functions2
Number of ports2
Number of terminals48
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)NOT SPECIFIED
propagation delay (tpd)10.2 ns
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.2 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold (Ni/Pd/Au)
Terminal formGULL WING
Terminal pitch0.4 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width4.4 mm
Base Number Matches1
74AVC16T245
Rev. 7 — 14 January 2019
16-bit dual supply translating transceiver with configurable
voltage translation; 3-state
Product data sheet
1. General description
The 74AVC16T245 is a 16-bit transceiver with bidirectional level voltage translation and 3-state
outputs. The device can be used as two 8-bit transceivers or as a 16-bit transceiver. It has dual
supplies (V
CC(A)
and V
CC(B)
) for voltage translation and four 8-bit input-output ports (nAn and
nBn) each with its own output enable (nOE) and send/receive (nDIR) input for direction control.
V
CC(A)
and V
CC(B)
can be independently supplied at any voltage between 0.8 V and 3.6 V making
the device suitable for low voltage translation between any of the following voltages: 0.8 V, 1.2 V,
1.5 V, 1.8 V, 2.5 V and 3.3 V. A HIGH on nDIR selects transmission from nAn to nBn while a LOW
on nDIR selects transmission from nBn to nAn. A HIGH on nOE causes the outputs to assume a
high-impedance OFF-state
The device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry
disables the output, preventing any damaging backflow current through the device when it is
powered down. In suspend mode when either V
CC(A)
or V
CC(B)
are at GND level, both nAn and nBn
are in the high-impedance OFF-state.
2. Features and benefits
Wide supply voltage range:
V
CC(A)
: 0.8 V to 3.6 V
V
CC(B)
: 0.8 V to 3.6 V
Complies with JEDEC standards:
JESD8-12 (0.8 V to 1.3 V)
JESD8-11 (0.9 V to 1.65 V)
JESD8-7 (1.2 V to 1.95 V)
JESD8-5 (1.8 V to 2.7 V)
JESD8-B (2.7 V to 3.6 V)
ESD protection:
HBM JESD22-A114F Class 3B exceeds 8000 V
MM JESD22-A115-A exceeds 200 V
CDM JESD22-C101D exceeds 1000 V
Maximum data rates:
380 Mbit/s (≥ 1.8 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 3.3 V translation)
200 Mbit/s (≥ 1.1 V to 2.5 V translation)
200 Mbit/s (≥ 1.1 V to 1.8 V translation)
150 Mbit/s (≥ 1.1 V to 1.5 V translation)
100 Mbit/s (≥ 1.1 V to 1.2 V translation)
Suspend mode
Latch-up performance exceeds 100 mA per JESD 78 Class II
Inputs accept voltages up to 3.6 V
I
OFF
circuitry provides partial Power-down mode operation
Specified from -40 °C to +85 °C and -40 °C to +125 °C

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Description 74AVC16T245 - 16-bit dual supply translating transceiver with configurable voltage translation; 3-state TSSOP 48-Pin 74AVC16T245 - 16-bit dual supply translating transceiver with configurable voltage translation; 3-state TSSOP 48-Pin 74AVC16T245 - 16-bit dual supply translating transceiver with configurable voltage translation; 3-state TSSOP 48-Pin 74AVC16T245 - 16-bit dual supply translating transceiver with configurable voltage translation; 3-state BGA 56-Pin 74AVC16T245 - 16-bit dual supply translating transceiver with configurable voltage translation; 3-state BGA 56-Pin 74AVC16T245 - 16-bit dual supply translating transceiver with configurable voltage translation; 3-state BGA 56-Pin
Brand Name Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia Nexperia
Parts packaging code TSSOP TSSOP TSSOP TSSOP BGA BGA BGA
package instruction TSSOP-48 TSSOP, TSSOP, TSSOP, VFBGA, VFBGA, BGA56,6X10,25 VFBGA, BGA56,6X10,25
Contacts 48 48 48 48 56 56 56
Manufacturer packaging code SOT480-1 SOT362-1 SOT362-1 SOT362-1 SOT702-1 SOT702-1 SOT702-1
series AVC AVC AVC AVC AVC AVC AVC
JESD-30 code R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PDSO-G48 R-PBGA-B56 R-PBGA-B56 R-PBGA-B56
length 9.7 mm 12.5 mm 12.5 mm 12.5 mm 7 mm 7 mm 7 mm
Logic integrated circuit type BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER
Number of digits 8 8 8 8 8 8 8
Number of functions 2 2 2 2 2 2 2
Number of ports 2 2 2 2 2 2 2
Number of terminals 48 48 48 48 56 56 56
Maximum operating temperature 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP TSSOP TSSOP VFBGA VFBGA VFBGA
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH GRID ARRAY, VERY THIN PROFILE, FINE PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED 260 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
propagation delay (tpd) 10.2 ns 10.2 ns 10.2 ns 10.2 ns 10.2 ns 10.2 ns 10.2 ns
Maximum seat height 1.1 mm 1.2 mm 1.2 mm 1.2 mm 1 mm 1 mm 1 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V 0.8 V
Nominal supply voltage (Vsup) 1.2 V 1.1 V 1.2 V 1.2 V 1.2 V 1.1 V 1.1 V
surface mount YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE
Terminal form GULL WING GULL WING GULL WING GULL WING BALL BALL BALL
Terminal pitch 0.4 mm 0.5 mm 0.5 mm 0.5 mm 0.65 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL DUAL DUAL BOTTOM BOTTOM BOTTOM
Maximum time at peak reflow temperature NOT SPECIFIED 30 NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED NOT SPECIFIED
width 4.4 mm 6.1 mm 6.1 mm 6.1 mm 4.5 mm 4.5 mm 4.5 mm
Base Number Matches 1 1 1 1 1 1 1
Maker Nexperia Nexperia Nexperia Nexperia Nexperia - -
Reach Compliance Code compliant compliant compliant compliant compliant - -
JESD-609 code e4 e4 - - - e3 e3
Humidity sensitivity level 1 1 - - - 1 1
Terminal surface Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au) - - - MATTE TIN MATTE TIN
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