74AVC1T45GW-Q100 datasheet, PDF

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74AVC1T45GW-Q100: DescriptionBus Transceiver, AVC Series, 1-Func, 1-Bit, True Output, CMOS, PDSO6; Categorylogic logic; File Size149KB，20 Pages; ManufacturerNexperia; Websitehttps://www.nexperia.com; Environmental Compliance

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74AVC1T45GW-Q100 Overview

Bus Transceiver, AVC Series, 1-Func, 1-Bit, True Output, CMOS, PDSO6

74AVC1T45GW-Q100 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Nexperia
package instruction	TSSOP,
Reach Compliance Code	compliant
series	AVC
JESD-30 code	R-PDSO-G6
JESD-609 code	e3
length	2 mm
Logic integrated circuit type	BUS TRANSCEIVER
Humidity sensitivity level	1
Number of digits	1
Number of functions	1
Number of ports	2
Number of terminals	6
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)	260
propagation delay (tpd)	9.9 ns
Filter level	AEC-Q100
Maximum seat height	1.1 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	0.8 V
Nominal supply voltage (Vsup)	1.2 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin (Sn)
Terminal form	GULL WING
Terminal pitch	0.65 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	1.25 mm
Base Number Matches	1

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74AVC1T45-Q100

Dual-supply voltage level translator/transceiver; 3-state

Rev. 3 — 6 January 2016

Product data sheet

1. General description

The 74AVC1T45-Q100 is a single bit, dual supply transceiver with 3-state output that

enables bidirectional level translation. It features two 1-bit input-output ports (A and B), a

direction control input (DIR) and dual supply pins (V

CC(A)

and V

CC(B)

). Both V

CC(A)

and

CC(B)

can be supplied at any voltage between 0.8 V and 3.6 V. This feature makes the

device suitable for translating between any of the low voltage nodes (0.8 V, 1.2 V, 1.5 V,

1.8 V, 2.5 V and 3.3 V). Pins A and DIR are referenced to V

CC(A)

and pin B is referenced

to V

CC(B)

. A HIGH on DIR allows transmission from A to B and a LOW on DIR allows

transmission from B to A.

The device is fully specified for partial power-down applications using I

OFF

. The I

OFF

circuitry disables the output, preventing any damaging backflow current through the

device when it is powered down. In suspend mode when either V

CC(A)

or V

CC(B)

are at

GND level, both A and B are in the high-impedance OFF-state.

This product has been qualified to the Automotive Electronics Council (AEC) standard

Q100 (Grade 1) and is suitable for use in automotive applications.

2. Features and benefits



Automotive product qualification in accordance with AEC-Q100 (Grade 1)



Specified from

40 C

to +85

C

and from

40 C

to +125

C



Wide supply voltage range:



CC(A)

: 0.8 V to 3.6 V



CC(B)

: 0.8 V to 3.6 V



High noise immunity



Complies with JEDEC standards:



JESD8-12 (0.8 V to 1.3 V)



JESD8-11 (0.9 V to 1.65 V)



JESD8-7 (1.2 V to 1.95 V)



JESD8-5 (1.8 V to 2.7 V)



JESD8-B (2.7 V to 3.6 V)



ESD protection:



MIL-STD-883, method 3015 Class 3B exceeds 8000 V



HBM JESD22-A114E Class 3B exceeds 8000 V



MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0

)



Maximum data rates:



500 Mbit/s (1.8 V to 3.3 V translation)



320 Mbit/s (< 1.8 V to 3.3 V translation)

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