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8422002AGIT

Description
Clock Generator, 226.66MHz, PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20
CategoryThe embedded processor and controller    Microcontrollers and processors   
File Size874KB,16 Pages
ManufacturerIDT (Integrated Device Technology)
Download Datasheet Parametric Compare View All

8422002AGIT Overview

Clock Generator, 226.66MHz, PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20

8422002AGIT Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
Parts packaging codeTSSOP
package instructionTSSOP,
Contacts20
Reach Compliance Codenot_compliant
ECCN codeEAR99
Other featuresALSO OPERATES AT 3.3V SUPPLY
JESD-30 codeR-PDSO-G20
JESD-609 codee0
length6.5 mm
Humidity sensitivity level1
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Maximum output clock frequency226.66 MHz
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)225
Master clock/crystal nominal frequency28.33 MHz
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage2.625 V
Minimum supply voltage2.375 V
Nominal supply voltage2.5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width4.4 mm
uPs/uCs/peripheral integrated circuit typeCLOCK GENERATOR, OTHER
Base Number Matches1
FemtoClock™ Crystal-to-LVHSTL
Frequency Synthesizer
ICS8422002I
DATA SHEET
General Description
The ICS8422002I is a 2 output LVHSTL Synthesizer
optimized to generate Fibre Channel reference clock
HiPerClockS™
frequencies and is a member of the HiPerClocks
TM
family of high performance clock solutions from IDT.
The following frequencies can be generated based on
the 2 frequency select pins (F_SEL[1:0]): 212.5MHz, 187.5MHz,
159.375MHz, 106.25MHz and 53.125MHz. The ICS8422002I uses
IDT’s 3
rd
generation low phase noise VCO technology and can
achieve 1ps or lower typical rms phase jitter, easily meeting Fibre
Channel jitter requirements. The ICS8422002I is packaged in a
20-pin TSSOP package.
Features
Two LVHSTL outputs (V
OH_max
= 1.2V)
Selectable crystal oscillator interface or
LVCMOS/LVTTL single-ended input
Supports the following output frequencies: 212.5MHz, 187.5MHz,
159.375MHz, 106.25MHz, 53.125MHz
VCO range: 560MHz - 680MHz
RMS phase jitter @ 212.5MHz, using a 26.5625MHz crystal
(637kHz - 10MHz): 0.59ps (typical)
Power supply modes:
Core/Output
3.3V/1.8V
2.5V/1.8V
-40°C to 85°C ambient operating temperature
Available in both standard (RoHS 5) and lead-free (RoHS 6)
packages
ICS
Frequency Select Function Table
Inputs
Input Frequency (MHz)
26.5625
26.5625
26.5625
26.5625
23.4375
F_SEL1
0 (default)
0
1
1
0 (default)
F_SEL0
0 (default)
1
0
1
0 (default)
M Div. Value
24
24
24
24
24
N Div. Value
3
4
6
12
3
M/N Div. Value
8
6
4
2
8
Output Frequency (MHz)
212.5
159.375
106.25
53.125
187.5
Block Diagram
F_SEL[1:0]
Pulldown
nPLL_SEL
Pulldown
F_SEL[1:0]
0 0 ÷3
(default)
1
01
10
11
÷4
÷6
÷12
2
Q0
1
nQ0
Pin Assignment
nc
V
DDO
Q0
nQ0
MR
nPLL_SEL
nc
V
DDA
F_SEL0
V
DD
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
DDO
Q1
nQ1
GND
V
DD
nXTAL_SEL
REF_CLK
XTAL_IN
XTAL_OUT
F_SEL1
REF_CLK
Pulldown
26.5625MHz
XTAL_IN
OSC
XTAL_OUT
nXTAL_SEL
Pulldown
0
Phase
Detector
VCO
560MHz - 680MHz
Q1
nQ1
0
M = 24 (fixed)
ICS8422002I
20-Lead TSSOP
6.5mm x 4.4mm x 0.925mm
package body
G Package
Top View
MR
Pulldown
ICS8422002AGI REVISION A AUGUST 12, 2009
1
©2009 Integrated Device Technology, Inc.

8422002AGIT Related Products

8422002AGIT 8422002AGI
Description Clock Generator, 226.66MHz, PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20 Clock Generator, 226.66MHz, PDSO20, 6.50 X 4.40 MM, 0.925 MM HEIGHT, MO-153, TSSOP-20
Is it lead-free? Contains lead Contains lead
Is it Rohs certified? incompatible incompatible
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology)
Parts packaging code TSSOP TSSOP
package instruction TSSOP, TSSOP,
Contacts 20 20
Reach Compliance Code not_compliant not_compliant
ECCN code EAR99 EAR99
Other features ALSO OPERATES AT 3.3V SUPPLY ALSO OPERATES AT 3.3V SUPPLY
JESD-30 code R-PDSO-G20 R-PDSO-G20
JESD-609 code e0 e0
length 6.5 mm 6.5 mm
Humidity sensitivity level 1 1
Number of terminals 20 20
Maximum operating temperature 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C
Maximum output clock frequency 226.66 MHz 226.66 MHz
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 225 225
Master clock/crystal nominal frequency 28.33 MHz 28.33 MHz
Certification status Not Qualified Not Qualified
Maximum seat height 1.2 mm 1.2 mm
Maximum supply voltage 2.625 V 2.625 V
Minimum supply voltage 2.375 V 2.375 V
Nominal supply voltage 2.5 V 2.5 V
surface mount YES YES
technology CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15)
Terminal form GULL WING GULL WING
Terminal pitch 0.65 mm 0.65 mm
Terminal location DUAL DUAL
Maximum time at peak reflow temperature 30 30
width 4.4 mm 4.4 mm
uPs/uCs/peripheral integrated circuit type CLOCK GENERATOR, OTHER CLOCK GENERATOR, OTHER
Base Number Matches 1 1
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