OT PLD, 50ns, TTL, CQCC20, CC-20
| Parameter Name | Attribute value |
| Maker | AMD |
| package instruction | QCCN, |
| Reach Compliance Code | unknown |
| ECCN code | 3A001.A.2.C |
| Other features | POWER-UP RESET; REGISTER PRELOAD; 1 EXTERNAL CLOCK |
| maximum clock frequency | 13.3 MHz |
| JESD-30 code | S-CQCC-N20 |
| length | 8.89 mm |
| Dedicated input times | 8 |
| Number of I/O lines | 2 |
| Number of terminals | 20 |
| Maximum operating temperature | 125 °C |
| Minimum operating temperature | -55 °C |
| organize | 8 DEDICATED INPUTS, 2 I/O |
| Output function | MIXED |
| Package body material | CERAMIC, METAL-SEALED COFIRED |
| encapsulated code | QCCN |
| Package shape | SQUARE |
| Package form | CHIP CARRIER |
| Programmable logic type | OT PLD |
| propagation delay | 50 ns |
| Certification status | Not Qualified |
| Maximum seat height | 2.032 mm |
| Maximum supply voltage | 5.5 V |
| Minimum supply voltage | 4.5 V |
| Nominal supply voltage | 5 V |
| surface mount | YES |
| technology | TTL |
| Temperature level | MILITARY |
| Terminal form | NO LEAD |
| Terminal pitch | 1.27 mm |
| Terminal location | QUAD |
| width | 8.89 mm |
| Base Number Matches | 1 |
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