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5962-8751507KX

Description
UVPROM, 8KX8, 35ns, CMOS, CDFP24, CERAMIC, FP-24
Categorystorage    storage   
File Size156KB,16 Pages
ManufacturerWaferscale Integration Inc.
Download Datasheet Parametric View All

5962-8751507KX Overview

UVPROM, 8KX8, 35ns, CMOS, CDFP24, CERAMIC, FP-24

5962-8751507KX Parametric

Parameter NameAttribute value
MakerWaferscale Integration Inc.
package instructionCERAMIC, FP-24
Reach Compliance Codeunknown
Maximum access time35 ns
JESD-30 codeR-GDFP-F24
memory density65536 bit
Memory IC TypeUVPROM
memory width8
Number of functions1
Number of terminals24
word count8192 words
character code8000
Operating modeASYNCHRONOUS
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize8KX8
Package body materialCERAMIC, GLASS-SEALED
encapsulated codeDFP
Package shapeRECTANGULAR
Package formFLATPACK
Parallel/SerialPARALLEL
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal formFLAT
Terminal locationDUAL
Base Number Matches1
REVISIONS
LTR
DESCRIPTION
DATE
APPROVED
A
Add six new device types for vendor CAGE number 65786. Add
vendor CAGE number 1FN41 as a source of supply for devices 01KX,
02KX, 03KX, and 04KX. Change to vendor similar part number for
vendor CAGE number 1FN41. Change to margin test method A for
vendor CAGE number 66579. Remove 4.5.1, 4.5.2, 4.5.3, figures 5
and 6, and table III from drawing. Change to parameters t
CS
and t
DF
in
table I. Change to figures 2 and 3. Editorial changes throughout.
5 year review and update. Changed input capacitance from 6 pF to
10 pF. ksr
93-01-21
M. A. Frye
B
06-06-06
Raymond Monnin
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
REV
SHEET
PREPARED BY
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
B
10
B
11
B
12
Kenneth Rice
DEFENSE SUPPLY CENTER COLUMBUS
COLUMBUS, OHIO 43218-3990
http://www.dscc.dla.mil
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS
AVAILABLE FOR USE BY
All DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
AMSC N/A
CHECKED BY
Charles Reusing
APPROVED BY
Michael A. Frye
DRAWING APPROVAL DATE
88-06-21
REVISION LEVEL
MICROCIRCUIT, MEMORY,
DIGITAL, CMOS, 8K X 8 UV
EPROM, MONOLITHIC SILICON
SIZE
CAGE CODE
B
A
SHEET
67268
1 OF
12
5962-87515
5962-E483-06
DSCC FORM 2233
APR 97

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Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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