5962-8982302MXC datasheet, PDF

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5962-8982302MXC: DescriptionField Programmable Gate Array, 320 CLBs, 5000 Gates, 70MHz, 320-Cell, CMOS, CPGA175, CERAMIC, PGA-175; CategoryProgrammable logic devices Programmable logic; File Size53KB，8 Pages; ManufacturerXILINX; Websitehttps://www.xilinx.com/

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5962-8982302MXC Overview

Field Programmable Gate Array, 320 CLBs, 5000 Gates, 70MHz, 320-Cell, CMOS, CPGA175, CERAMIC, PGA-175

5962-8982302MXC Parametric

Parameter Name	Attribute value
Maker	XILINX
Parts packaging code	PGA
package instruction	PGA, PGA175,16X16
Contacts	175
Reach Compliance Code	unknown
ECCN code	3A001.A.2.C
maximum clock frequency	70 MHz
Combined latency of CLB-Max	2 ns
JESD-30 code	S-CPGA-P175
JESD-609 code	e4
length	42.164 mm
Configurable number of logic blocks	320
Equivalent number of gates	5000
Number of entries	144
Number of logical units	320
Output times	144
Number of terminals	175
Maximum operating temperature	125 °C
Minimum operating temperature	-55 °C
organize	320 CLBS, 5000 GATES
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA175,16X16
Package shape	SQUARE
Package form	GRID ARRAY
power supply	5 V
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Certification status	Not Qualified
Filter level	MIL-STD-883
Maximum seat height	4.318 mm
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	MILITARY
Terminal surface	GOLD
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
width	42.164 mm
Base Number Matches	1

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All new designs should use XC3000A.

Information on XC3000 is presented here

as a reference for existing designs.

XC3000 bitstreams are upward compatible

to XC3000A without modification.

IMPORTANT NOTICE

XC3000

Logic Cell Array Family

Product Specification

Features

Description

XC3000 is the original family of devices in the XC3000

class of Field Programmable Gate Array (FPGA) architec-

tures. The XC3000 family has a proven track record in

addressing a wide range of design applications, including

general logic replacement and sub-systems integration.

For a thorough description of the XC3000 architecture see

the preceding pages of this data book.

The XC3000 Family covers a range of nominal device

densities from 2,000 to 9,000 gates, practically achievable

densities from 1,000 to 6,000 gates. Device speeds,

described in terms of maximum guaranteed toggle fre-

quencies, range from 70 to 125 MHz. The performance of

a completed design depends upon placement and routing

implementation, so, like with any gate array, the final

verification of device utilization and performance can only

be known after the design has been placed and routed.

•

Industry-leading FPGA family with five device types

– Logic densities from 1,000 to 6,000 gates

– Up to 144 user-definable I/Os

•

Guaranteed 70- to 125-MHz toggle rates, 9 to 5.5 ns

logic delays

•

Advanced CMOS static memory technology

– Low quiescent and active power consumption

•

XC3000-specific features

– Ultra-low current option in Power-Down mode

– 4-mA output sink and source current

– Broad range of package options includes plastic and

ceramic quad flat packs, plastic leaded chip carriers

and pin grid arrays

– 100% bitstream compatible with the XC3100 family

– Commercial, industrial, military, “high rel”, and MIL-

STD-883 Class B grade devices

– Easy migration to XC3300 series of HardWire mask-

programmed devices for high-volume production

Device

XC3020

XC3030

XC3042

XC3064

XC3090

CLBs

100

144

224

320

Array

8x8

10 x 10

12 x 12

16 x 14

16 x 20

User I/Os

Max

120

144

Flip-Flops

256

360

480

688

928

Horizontal

Longlines

Configuration

Data Bits

14,779

22,176

30,784

46,064

64,160

2-153

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