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5962-8982301MTC

Description
Field Programmable Gate Array, CMOS, CQFP164
CategoryProgrammable logic devices    Programmable logic   
File Size573KB,36 Pages
ManufacturerDefense Logistics Agency
Download Datasheet Parametric View All

5962-8982301MTC Overview

Field Programmable Gate Array, CMOS, CQFP164

5962-8982301MTC Parametric

Parameter NameAttribute value
MakerDefense Logistics Agency
Reach Compliance Codeunknown
ECCN code3A001.A.2.C
JESD-30 codeS-CQFP-F164
JESD-609 codee4
length28.702 mm
Number of terminals164
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeGQFF
Package shapeSQUARE
Package formFLATPACK, GUARD RING
Programmable logic typeFIELD PROGRAMMABLE GATE ARRAY
Certification statusNot Qualified
Maximum seat height3.302 mm
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceGOLD
Terminal formFLAT
Terminal pitch0.65 mm
Terminal locationQUAD
width28.702 mm
Base Number Matches1
REVISIONS
LTR
B
C
DESCRIPTION
Redrawn with changes. Converted drawing to one part-one part number SMD
format. Corrected art work for Y and Z packages.
Redrawn with changes. Added devices 03 and 04. Changes to paragraph
4.2.1. Changes to table I and table IIA. Changed the max lead thickness on
case outline Z.
Added case outlines U and T. Made format changes, editorial changes
throughout.
Changes in accordance with NOR 5962-R198-95.
Changes in accordance with NOR 5962-R005-97.
Updated drawing to current requirements. Editorial changes throughout. - gap
Boilerplate update, part of 5 year review. ksr
Update drawing to current MIL-PRF-38535 requirements. - llb
DATE (YR-MO-DA)
92-11-16
93-09-10
APPROVED
M.A. Frye
M.A. Frye
D
E
F
G
H
J
94-01-27
95-10-05
96-10-04
01-11-09
07-04-27
15-11-18
M.A. Frye
M.A. Frye
Raymond Monnin
Raymond Monnin
Robert M. Heber
Charles Saffle
REV
SHEET
REV
SHEET
REV STATUS
OF SHEETS
PMIC N/A
J
35
J
15
J
16
J
17
J
18
REV
SHEET
PREPARED BY
Kenneth Rice
J
19
J
20
J
21
J
1
J
22
J
2
J
23
J
3
J
24
J
4
J
25
J
5
J
26
J
6
J
27
J
7
J
28
J
8
J
29
J
9
J
30
J
10
J
31
J
11
J
32
J
12
J
33
J
13
J
34
J
14
STANDARD
MICROCIRCUIT
DRAWING
THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE
CHECKED BY
Rajesh Pithadia
APPROVED BY
Mike Frye
DRAWING APPROVAL DATE
91-11-08
REVISION LEVEL
J
DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil
MICROCIRCUIT, MEMORY, DIGITAL, CMOS 9000
GATE PROGRAMMABLE LOGIC ARRAY,
MONOLITHIC SILICON
SIZE
A
CAGE CODE
AMSC N/A
67268
SHEET
1 OF 35
5962-89823
DSCC FORM 2233
APR 97
5962-E066-16
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