AD7549KR datasheet, PDF - EEWORLD Datasheet

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AD7549KR: DescriptionPARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20; Categorysemiconductor logic; File Size495KB，8 Pages; ManufacturerADI; Websitehttps://www.analog.com

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AD7549KR Overview

PARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20

AD7549KR Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	20
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Rated supply voltage	15 V
Maximum linear error	0.0244 %
Processing package description	0.300 INCH, CERDIP-20
state	ACTIVE
Craftsmanship	CMOS
packaging shape	Rectangle
Package Size	IN-line
Terminal form	THROUGH-hole
Terminal spacing	2.54 mm
terminal coating	tin lead
Terminal location	pair
Packaging Materials	Ceramic, Glass-SEALED
Temperature level	INDUSTRIAL
Input format	Parallel, 4-bit
Type of converter	digital to analog converter
Input bit encoding	binary, OFFSET binary
Rated settling time	0.8000 us

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AD7549KR Related Products

	AD7549KR	AD7549	AD7549SQ	AD7549TQ	AD7549JR	AD7549SE	AD7549TE
Description	PARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20	PARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20	PARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20	PARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20	PARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20	PARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20	PARALLEL, 4 BITS INPUT LOADING, 0.8 us SETTLING TIME, 12-BIT DAC, CDIP20
Number of functions	1	1	1	1	1	1	1
Number of terminals	20	20	20	20	20	20	20
Maximum operating temperature	85 Cel	85 Cel	85 Cel	85 Cel	85 Cel	85 Cel	85 Cel
Minimum operating temperature	-40 Cel	-40 Cel	-40 Cel	-40 Cel	-40 Cel	-40 Cel	-40 Cel
Rated supply voltage	15 V	15 V	15 V	15 V	15 V	15 V	15 V
Maximum linear error	0.0244 %	0.0244 %	0.0244 %	0.0244 %	0.0244 %	0.0244 %	0.0244 %
Processing package description	0.300 INCH, CERDIP-20	0.300 INCH, CERDIP-20	0.300 INCH, CERDIP-20	0.300 INCH, CERDIP-20	0.300 INCH, CERDIP-20	0.300 INCH, CERDIP-20	0.300 INCH, CERDIP-20
state	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE	ACTIVE
Craftsmanship	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
packaging shape	Rectangle	Rectangle	Rectangle	Rectangle	Rectangle	Rectangle	Rectangle
Package Size	IN-line	IN-line	IN-line	IN-line	IN-line	IN-line	IN-line
Terminal form	THROUGH-hole	THROUGH-hole	THROUGH-hole	THROUGH-hole	THROUGH-hole	THROUGH-hole	THROUGH-hole
Terminal spacing	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm	2.54 mm
terminal coating	tin lead	tin lead	tin lead	tin lead	tin lead	tin lead	tin lead
Terminal location	pair	pair	pair	pair	pair	pair	pair
Packaging Materials	Ceramic, Glass-SEALED	Ceramic, Glass-SEALED	Ceramic, Glass-SEALED	Ceramic, Glass-SEALED	Ceramic, Glass-SEALED	Ceramic, Glass-SEALED	Ceramic, Glass-SEALED
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Input format	Parallel, 4-bit	Parallel, 4-bit	Parallel, 4-bit	Parallel, 4-bit	Parallel, 4-bit	Parallel, 4-bit	Parallel, 4-bit
Type of converter	digital to analog converter	digital to analog converter	digital to analog converter	digital to analog converter	digital to analog converter	digital to analog converter	digital to analog converter
Input bit encoding	binary, OFFSET binary	binary, OFFSET binary	binary, OFFSET binary	binary, OFFSET binary	binary, OFFSET binary	binary, OFFSET binary	binary, OFFSET binary
Rated settling time	0.8000 us	0.8000 us	0.8000 us	0.8000 us	0.8000 us	0.8000 us	0.8000 us

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