EEWORLDEEWORLDEEWORLD

Part Number

Search

RD38F104000ZDQ0

Description
Wireless Flash Memory (W18/W30 SCSP)
File Size604KB,46 Pages
ManufacturerNumonyx ( Micron )
Websitehttps://www.micron.com
Download Datasheet View All

RD38F104000ZDQ0 Overview

Wireless Flash Memory (W18/W30 SCSP)

Numonyx™ Wireless Flash Memory
(W18/W30 SCSP)
32WQ and 64WQ Family with Asynchronous RAM
Datasheet
Product Features
Device Architecture
— Flash Density: 32-Mbit, 64-Mbit
— Async PSRAM Density: 16-Mbit, 32-Mbit
— Top, Bottom or Dual flash parameter
configuration
Device Voltage
— Flash VCC = 1.8 V; Flash VCCQ = 1.8 V or 3.0 V
— RAM VCC = 1.8 V or 3.0 V
Device Packaging
— 88 balls (8 x 10 active ball matrix)
— Area: 8x10 mm
— Height: 1.2 mm to 1.4 mm
PSRAM Performance
— 70 ns initial access, 25 ns async page reads at
1.8 V I/O
— 70 ns initial access async PSRAM at 1.8 V
I/O
— 70 ns initial access, 25 ns async page
reads at 3.0 V I/O
SRAM Performance
— 70 ns initial access at 1.8 V or 3.0 V I/O
Quality and Reliability
— Extended Temperature: –25 °C to +85 °C
— Minimum 100K flash block erase cycle
— 90 nm ETOX™ IX flash technology
— 130 nm ETOX™ VIII flash technology
Flash Performance
— 65 ns initial access at 1.8 V I/O
— 70 ns initial access at 3.0 V I/O
— 25 ns async page at 1.8 V or 3.0 V I/O
— 14 ns sync reads (t
CHQV
) at 1.8 V I/O
— 20 ns sync reads (t
CHQV
) at 3.0 V I/O
— Enhanced Factory Programming:
3.10 µs/Word (Typ)
Flash Architecture
— Read-While-Write/Erase
— Asymmetrical blocking structure
— 4-KWord parameter blocks (Top or
Bottom)
— 32-KWord main blocks
— 4-Mbit partition size
— 128-bit One-Time Programmable
(OTP) Protection Register
— Zero-latency block locking
— Absolute write protection with block
lock using F-VPP and F-WP#
Flash Software
— Numonyx™ Flash Data Integrator
(FDI) and Common Flash Interface
(CFI)
Order Number: 251407-13
November 2007
FPGA learning materials
Mr. Li Fan is a senior IT engineer in embedded systems. He has 18 years of work experience in embedded systems development. He is currently a senior FPGA lecturer and project manager at Beijing Zhixin...
zxopen00 ARM Technology
bq4050 protection recovery problem
The bq4050 protection recovery problem is as shown below: When OCD2 is set above 10.8A, the delay time control is not received and protection occurs immediately. It is not subject to ASCD recovery con...
qwqwqw2088 Analogue and Mixed Signal
Is there anyone who has done secondary development of GIS under Windows CE? What GIS platform do you use?
What GIS platform do you use? Can you introduce it to me? Which one is better?...
fossilren Embedded System
Reflections and how to handle them in high-speed systems
Transmission line theory tells us that reflections are the result of any change in signal impedance that may be encountered from the output of a source all the way to the input of a receiving componen...
fish001 Microcontroller MCU
Very urgent! Waiting online!!
I compiled a system myself, wrote it into the SD card, and then started the board, but it stopped at waiting for root device /dev/mmcblk02p. I don't know what went wrong. I hope someone can help me....
leecoo2020q Linux and Android
Questions about the definition and use of AVR bit variables
uchar bdata transdata; //This variable can be a bit operation variable sbit transbit = transdata^7; What does this uchar bdata mean? struct data { unsigned bit0:1; unsigned bit1:1; unsigned bit2:1; un...
jsglf Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 23  2303  372  2037  2875  1  47  8  42  58 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号