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74AHC02BQ-Q100

Description
NOR Gate, AHC/VHC/H/U/V Series, 4-Func, 2-Input, CMOS, PQCC14
Categorylogic    logic   
File Size121KB,15 Pages
ManufacturerNexperia
Websitehttps://www.nexperia.com
Environmental Compliance
Download Datasheet Parametric View All

74AHC02BQ-Q100 Overview

NOR Gate, AHC/VHC/H/U/V Series, 4-Func, 2-Input, CMOS, PQCC14

74AHC02BQ-Q100 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNexperia
package instruction2.50 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT762-1, DHVQFN-14
Reach Compliance Codecompliant
seriesAHC/VHC/H/U/V
JESD-30 codeR-PQCC-N14
JESD-609 codee4
length3 mm
Logic integrated circuit typeNOR GATE
Humidity sensitivity level1
Number of functions4
Number of entries2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Package shapeRECTANGULAR
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)14.5 ns
Filter levelAEC-Q100
Maximum seat height1 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNickel/Palladium/Gold/Silver (Ni/Pd/Au/Ag)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
width2.5 mm
Base Number Matches1
74AHC02-Q100;
74AHCT02-Q100
Quad 2-input NOR gate
Rev. 1 — 23 May 2013
Product data sheet
1. General description
The 74AHC02-Q100; 74AHCT02-Q100 is a high-speed Si-gate CMOS device and is pin
compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with
JEDEC standard No. 7-A.
The 74AHC02-Q100; 74AHCT02-Q100 provides a quad 2-input NOR function.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
Balanced propagation delays
All inputs have a Schmitt-trigger action
Inputs accept voltages higher than V
CC
Input levels:
For 74AHC02-Q100: CMOS level
For 74AHCT02-Q100: TTL level
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
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