74LVC3G14GM datasheet, PDF - EEWORLD Datasheet

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74LVC3G14GM: DescriptionInverter, CMOS, PDSO8,; Categorylogic logic; File Size89KB，17 Pages; ManufacturerPhilips Semiconductors (NXP Semiconductors N.V.); Websitehttps://www.nxp.com/

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74LVC3G14GM Overview

Inverter, CMOS, PDSO8,

74LVC3G14GM Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Philips Semiconductors (NXP Semiconductors N.V.)
package instruction	SON, SOLCC8,.04,20
Reach Compliance Code	unknown
JESD-30 code	R-PDSO-N8
JESD-609 code	e0
Load capacitance (CL)	50 pF
Logic integrated circuit type	INVERTER
MaximumI(ol)	0.024 A
Number of terminals	8
Maximum operating temperature	125 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SON
Encapsulate equivalent code	SOLCC8,.04,20
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
method of packing	TAPE AND REEL
power supply	3.3 V
Prop。Delay @ Nom-Sup	6.7 ns
Certification status	Not Qualified
Schmitt trigger	YES
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	AUTOMOTIVE
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	NO LEAD
Terminal pitch	0.5 mm
Terminal location	DUAL
Base Number Matches	1

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74LVC3G14

Triple inverting Schmitt trigger with 5 V tolerant input

Rev. 02 — 27 October 2004

Product data sheet

1. General description

The 74LVC3G14 is a high-performance, low-power, low-voltage, Si-gate CMOS device

and superior to most advanced CMOS compatible TTL-families.

Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this

device as translator in a mixed 3.3 V and 5 V environment.

This device is fully speciﬁed for partial power-down applications using I

off

. The I

off

circuitry

disables the output, preventing the damaging backﬂow current through the device when it

is powered down.

The 74LVC3G14 provides three inverting buffers with Schmitt-trigger action. It is capable

of transforming slowly changing input signals into sharply deﬁned, jitter-free output

signals.

2. Features

Wide supply voltage range from 1.65 V to 5.5 V

5 V tolerant input/output for interfacing with 5 V logic

High noise immunity

ESD protection:

HBM EIA/JESD22-A114-B exceeds 2000 V

MM EIA/JESD22-A115-A exceeds 200 V.

±24

mA output drive (V

= 3.0 V)

CMOS low power consumption

Latch-up performance exceeds 250 mA

Direct interface with TTL levels

Multiple package options

Speciﬁed from

−40 °C

to +85

°C

and

−40 °C

to +125

°C.

3. Applications

Wave and pulse shaper for highly noisy environment

Astable multivibrator

Monostable multivibrator.

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