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74LVC74APW-Q100

Description
LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14
Categorylogic    logic   
File Size141KB,18 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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74LVC74APW-Q100 Overview

LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14

74LVC74APW-Q100 Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerNXP
package instruction4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14
Reach Compliance Codeunknown
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-G14
length5 mm
Logic integrated circuit typeD FLIP-FLOP
Humidity sensitivity level1
Number of digits1
Number of functions2
Number of terminals14
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)11.9 ns
Filter levelAEC-Q100
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)1.2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
Trigger typePOSITIVE EDGE
width4.4 mm
minfmax120 MHz
74LVC74A-Q100
Dual D-type flip-flop with set and reset; positive-edge trigger
Rev. 2 — 5 April 2013
Product data sheet
1. General description
The 74LVC74A-Q100 is a dual edge triggered D-type flip-flop. It has individual data (nD)
inputs, clock (nCP) inputs, set (nSD) and (nRD) inputs, and complementary nQ and nQ
outputs.
The set and reset are asynchronous active LOW inputs and operate independently of the
clock input. Information on the data input is transferred to the nQ output on the
LOW-to-HIGH transition of the clock pulse. The nD inputs must be stable one set-up time
prior to the LOW-to-HIGH clock transition, for predictable operation.
Schmitt trigger action at all inputs makes the circuit highly tolerant of slower input rise and
fall times.
This product has been qualified to the Automotive Electronics Council (AEC) standard
Q100 (Grade 1) and is suitable for use in automotive applications.
2. Features and benefits
Automotive product qualification in accordance with AEC-Q100 (Grade 1)
Specified from
40 C
to +85
C
and from
40 C
to +125
C
5 V tolerant inputs for interlacing with 5 V logic
Wide supply voltage range from 1.2 V to 3.6 V
CMOS low power consumption
Direct interface with TTL levels
ESD protection:
MIL-STD-883, method 3015 exceeds 2000 V
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0
)
Multiple package options

74LVC74APW-Q100 Related Products

74LVC74APW-Q100 74LVC74ABQ-Q100
Description LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO14, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14 LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PQCC14, 2.50 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT762-1, DHVQFN-14
Is it Rohs certified? conform to conform to
Maker NXP NXP
package instruction 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14 2.50 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT762-1, DHVQFN-14
Reach Compliance Code unknown unknown
series LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-G14 R-PQCC-N14
length 5 mm 3 mm
Logic integrated circuit type D FLIP-FLOP D FLIP-FLOP
Humidity sensitivity level 1 1
Number of digits 1 1
Number of functions 2 2
Number of terminals 14 14
Maximum operating temperature 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C
Output polarity COMPLEMENTARY COMPLEMENTARY
Package body material PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code TSSOP HVQCCN
Package shape RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260
propagation delay (tpd) 11.9 ns 11.9 ns
Filter level AEC-Q100 AEC-Q100
Maximum seat height 1.1 mm 1 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V
Minimum supply voltage (Vsup) 1.2 V 1.2 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V
surface mount YES YES
technology CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE
Terminal form GULL WING NO LEAD
Terminal pitch 0.65 mm 0.5 mm
Terminal location DUAL QUAD
Maximum time at peak reflow temperature 30 30
Trigger type POSITIVE EDGE POSITIVE EDGE
width 4.4 mm 2.5 mm
minfmax 120 MHz 120 MHz
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