®
74LVX125
LOW VOLTAGE QUAD BUS BUFFERS (3-STATE)
WITH 5V TOLERANT INPUTS
s
s
s
s
s
s
s
s
s
s
HIGH SPEED: t
PD
= 4.4 ns (TYP.) at V
CC
= 3.3V
5V TOLERANT INPUTS
POWER-DOWN PROTECTION ON INPUTS
INPUT VOLTAGE LEVEL:
V
IL
= 0.8V, V
IH
= 2V at V
CC
= 3V
LOW POWER DISSIPATION:
I
CC
= 2
µ
A (MAX.) at T
A
= 25
o
C
LOW NOISE:
V
OLP
= 0.3 V (TYP.) at V
CC
= 3.3V
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4 mA (MIN)
BALANCED PROPAGATION DELAYS:
t
PLH
≅
t
PHL
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 125
IMPROVED LATCH-UP IMMUNITY
M
(Micro Package)
T
(TSSOP Package)
ORDER CODES :
74LVX125M
74LVX125T
This device requires the 3-STATE control input G
to be set high to place the output into the high
impedance state.
It has better speed performance at 3.3V than 5V
LS-TTL family combined with the true CMOS low
power consumption.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
DESCRIPTION
The LVX125 is a low voltage CMOS QUAD BUS
BUFFERS fabricated with sub-micron silicon gate
and
double-layer metal
wiring
C
2
MOS
technology. It is ideal for low power and low noise
3.3V applications.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 1999
1/9
74LVX125
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
1, 4, 10, 13
2, 5, 9, 12
3, 6, 8, 11
7
14
SYMBOL
G1 to G4
A1 to A4
Y1 to Y4
GND
V
CC
NAME AND FUNCT ION
Output Enable Inputs
Data Inputs
Data Outputs
Ground (0V)
Positive Supply Voltage
TRUTH TABLE
A
X
L
H
G
H
L
L
Y
Z
L
H
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
T
stg
T
L
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Current
Storage Temperature
Lead Temperature (10 sec)
Parameter
Value
-0.5 to +7.0
-0.5 to 7.0
-0.5 to V
CC
+ 0.5
- 20
±
20
±
25
±
50
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
o
o
I
CC
or I
GND
DC V
CC
or Ground Current
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
dt/dv
Input Voltage
Output Voltage
Operating Temperature:
Input Rise and Fall Time (V
CC
= 3V) (note 2)
Parameter
Supply Voltage (note 1)
Valu e
2 to 3.6
0 to 5.5
0 to V
CC
-40 to +85
0 to 100
Unit
V
V
V
o
C
ns/V
1) Truth Table guaranteed: 1.2V to 3.6V
2) V
IN
from 0.8V to 2V
2/9
74LVX125
DC SPECIFICATIONS
Symb ol
Parameter
V
CC
(V)
V
IH
High Level Input Voltage
2.0
3.0
3.6
V
IL
Low Level Input Voltage
2.0
3.0
3.6
V
OH
High Level Output
Voltage
Low Level Output
Voltage
Input Leakage Current
3 State Output Leakage
Current
Quiescent Supply
Current
2.0
3.0
3.0
V
OL
2.0
3.0
3.0
I
I
I
OZ
I
CC
3.6
3.6
3.6
V
I
=
V
IH
or
V
IL
V
I
=
V
IH
or
V
IL
(*)
(* )
Test Co nditions
o
Valu e
T
A
= 25 C
Min.
1.5
2.0
2.4
0.5
0.8
0.8
T yp.
Max.
-40 to 85 C
Min.
1.5
2.0
2.4
0.5
0.8
0.8
1.9
2.9
2.48
0.0
0.0
0.1
0.1
0.36
±0.1
±0.25
4
0.1
0.1
0.44
±1
±2.5
40
Max.
o
Un it
V
V
I
O
=-50
µA
I
O
=-50
µA
I
O
=-4 mA
I
O
=50
µ
A
I
O
=50
µA
I
O
=4 mA
1.9
2.9
2.58
2.0
3.0
V
V
µA
µA
µA
V
I
= 5.5V or GND
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
V
I
= V
CC
or GND
(*) All outputs loaded.
DYNAMIC SWITCHING CHARACTERISTICS
Symb ol
Parameter
V
CC
(V)
V
OLP
V
OLV
V
IHD
V
ILD
Dynamic Low Voltage
Quiet Output (note 1, 2)
Dynamic High Voltage
Input (note 1, 3)
Dynamic Low Voltage
Input (note 1, 3)
3.3
-0.5
3.3
3.3
C
L
= 50 pF
0.8
Test Co nditions
o
Valu e
T
A
= 25 C
Min.
T yp.
0.3
-0.3
2
Max.
0.5
-40 to 85 C
Min.
Max.
o
Un it
V
1) Worst case package
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n -1) outputs switching and one output at GND
3) max number of data inputs (n) switching. (n-1) switching 0V to3.3V. Inputs under test switching: 3.3V to threshold (V
ILD
), 0V to threshold (V
IHD
). f=1MHz
3/9
74LVX125
AC ELECTRICAL CHARACTERISTICS
(Input t
r
= t
f
=3 ns)
Symb ol
Parameter
T est Con ditio n
V
CC
C
L
(V)
(p F)
2.7
2.7
3.3
(*)
3.3
(*)
2.7
2.7
3.3
3.3
(*)
t
PLZ
t
PHZ
t
OSLH
t
OSHL
Output Disable Time
Output to Output Skew
Time (note 1, 2)
2.7
3.3
(*)
2.7
3.3
(*)
(*)
t
PLH
t
PHL
Propagation Delay Time
15
50
15
50
15
50
15
50
50
50
50
50
R
L
= 1 KΩ
Valu e
T
A
= 25 C
-40 to 85
o
C
Min. T yp. Max. Min. Max.
5.8
10.1
1.0
13.5
o
Un it
t
PZL
t
PZH
Output Enable Time
R
L
= 1 K
Ω
8.3
4.4
6.9
5.3
7.8
4.0
6.5
10.0
8.3
13.6
6.2
9.7
9.3
12.8
5.6
9.1
15.7
11.2
1.5
1.5
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
17.0
8.5
12.0
12.5
16.0
7.5
11.0
19.0
13.0
1.5
1.5
ns
ns
ns
ns
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any twooutputs of the same device switching in the
same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
±
0.3V
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
V
CC
(V)
C
IN
C
OUT
C
PD
Input Capacitance
Output Capacitance
Power Dissipation
Capacitance (note 1)
3.3
3.3
3.3
f
IN
= 10 MHz
Test Co nditions
o
Valu e
T
A
= 25 C
Min.
T yp.
4
6
14
Max.
10
-40 to 85 C
Min.
Max.
10
o
Un it
pF
pF
pF
1) C
PD
isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operting current can be obtained by the following equation. I
CC
(opr) = C
PD
•
V
CC
•
f
IN
+ I
CC
/4(per circuit)
4/9
74LVX125
TEST CIRCUIT
T EST
t
PLH
, t
PHL
t
PZL
, t
PLZ
t
PZH
, t
PHZ
C
L
= 15/50 pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 1KΩ orequivalent
R
T
= Z
OUT
of pulse generator (typically 50Ω)
SW IT CH
Open
V
CC
GND
WAVEFORM 1: PROPAGATION DELAYS
(f=1MHz; 50% duty cycle)
5/9
RF/Wirelessly
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