HYM7V64200CLTZG-10P datasheet, PDF

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HYM7V64200CLTZG-10P: DescriptionSynchronous DRAM Module, 2MX64, CMOS, GLASS EPOXY, SODIMM-144; Categorystorage storage; File Size261KB，14 Pages; ManufacturerSK Hynix; Websitehttp://www.hynix.com/eng/

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HYM7V64200CLTZG-10P Overview

Synchronous DRAM Module, 2MX64, CMOS, GLASS EPOXY, SODIMM-144

HYM7V64200CLTZG-10P Parametric

Parameter Name	Attribute value
Maker	SK Hynix
Parts packaging code	MODULE
package instruction	,
Contacts	144
Reach Compliance Code	unknown
ECCN code	EAR99
access mode	DUAL BANK PAGE BURST
JESD-30 code	R-XDMA-N168
memory density	134217728 bit
Memory IC Type	SYNCHRONOUS DRAM MODULE
memory width	64
Number of functions	1
Number of ports	1
Number of terminals	168
word count	2097152 words
character code	2000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	2MX64
Package body material	UNSPECIFIED
Package shape	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	NO LEAD
Terminal location	DUAL

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HYM7V64200C Z-Series

SO-DIMM 2Mx64 bit SDRAM Module

based on 2Mx8 SDRAM, LVTTL, 4K-Refresh

DESCRIPTION

The HYM7V64200C is high speed 3.3Volt CMOS Synchronous DRAM module consisting of eight 2Mx8 bit

Synchronous DRAMs in 44-pin TSOPII and one 8-pin TSSOP 2K bit EEPROM on a 168-pin glass-epoxy

circuit board. One 0.33µF and one 0.1µF decoupling capacitors are mounted for each SDRAM.

The HYM7V64200C is a gold plated socket type Dual In-line Memory Module suitable for easy interchange

and addition of 16M byte memory. All inputs and outputs are synchronized with the rising edge of the clock

input. The data paths are internally pipelined to achieve very high bandwidth. All input and output voltage

levels are compatible with LVTTL.

Programmable options include the length of pipeline (Read latency of 1,2 or 3), the number of

consecutive read of write cycles initiated by a single control command (Burst length of 1,2,4,8, or full page),

and the burst count sequence(sequential or interleave). A burst of read of write cycles in progress can be

terminated by a burst terminate command of can be interrupted and replaced by a new burst read or write

command on any cycle. (This pipelined design is not restricted by a ‘ 2N’ rule.)

FEATURES

•

144Pin SO-DIMM, JEDEC Standard

Serial Presence Detect with EEPROM

Single 3.3V±0.3V power supply

All module pins are LVTTL compatible

4096 refresh cycles / 64ms

All inputs and outputs referenced to positive

edge of system clock

•

Auto refresh and Self Refresh

•

Programmable burst lengths and sequences

- 1,2,4,8 and full page for Sequential type

- 1,2,4 and 8 for Interleave type

•

Programmable /CAS latency ; 1,2,3 clocks

ORDERING INFORMATION

Part No.

HYM7V64200CLTZG -8

HYM7V64200CLTZG -10P

HYM7V64200CLTZG -10S

HYM7V64200CLTZG -10

Max.

Frequency

125MHz

100MHz

Power

L-Part

PCB

height

1.00

Package

TSOPII

Based Comp. Part No

HY57V161610CLTC-8

HY57V161610CLTC-10P

HY57V161610CLTC-10S

HY57V161610CLTC-10

This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume

any responsibility for use of circuits described. No patent licenses are implied.

Rev. 0.5 / MAY. 98

1998 Hyundai Semiconductor

HYM7V64200CLTZG-10P Related Products

	HYM7V64200CLTZG-10P	HYM7V64200CLTZG-10S	HYM7V64200CLTZG-10	HYM7V64200CLTZG-8
Description	Synchronous DRAM Module, 2MX64, CMOS, GLASS EPOXY, SODIMM-144	Synchronous DRAM Module, 2MX64, CMOS, GLASS EPOXY, SODIMM-144	Synchronous DRAM Module, 2MX64, CMOS, GLASS EPOXY, SODIMM-144	Synchronous DRAM Module, 2MX64, CMOS, GLASS EPOXY, SODIMM-144
Maker	SK Hynix	SK Hynix	SK Hynix	SK Hynix
Parts packaging code	MODULE	MODULE	MODULE	MODULE
Contacts	144	144	144	144
Reach Compliance Code	unknown	unknown	unknown	unknow
ECCN code	EAR99	EAR99	EAR99	EAR99
access mode	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST	DUAL BANK PAGE BURST
JESD-30 code	R-XDMA-N168	R-XDMA-N168	R-XDMA-N168	R-XDMA-N168
memory density	134217728 bit	134217728 bit	134217728 bit	134217728 bi
Memory IC Type	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE	SYNCHRONOUS DRAM MODULE
memory width	64	64	64	64
Number of functions	1	1	1	1
Number of ports	1	1	1	1
Number of terminals	168	168	168	168
word count	2097152 words	2097152 words	2097152 words	2097152 words
character code	2000000	2000000	2000000	2000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	70 °C	70 °C	70 °C	70 °C
organize	2MX64	2MX64	2MX64	2MX64
Package body material	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED	UNSPECIFIED
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY	MICROELECTRONIC ASSEMBLY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum supply voltage (Vsup)	3.6 V	3.6 V	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	3.3 V	3.3 V
surface mount	NO	NO	NO	NO
technology	CMOS	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal form	NO LEAD	NO LEAD	NO LEAD	NO LEAD
Terminal location	DUAL	DUAL	DUAL	DUAL

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