CAT1021WI-42TE13 datasheet, PDF

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CAT1021WI-42TE13: Description1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, LEAD AND HALOGEN FREE, SOIC-8; CategoryPower/power management The power supply circuit; File Size193KB，20 Pages; ManufacturerON Semiconductor; Websitehttp://www.onsemi.cn; Environmental Compliance

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CAT1021WI-42TE13 Overview

1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO8, LEAD AND HALOGEN FREE, SOIC-8

CAT1021WI-42TE13 Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	ON Semiconductor
Parts packaging code	SOIC
package instruction	SOP,
Contacts	8
Reach Compliance Code	compliant
ECCN code	EAR99
Adjustable threshold	NO
Analog Integrated Circuits - Other Types	POWER SUPPLY MANAGEMENT CIRCUIT
JESD-30 code	R-PDSO-G8
JESD-609 code	e3
length	4.9 mm
Number of channels	1
Number of functions	1
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	1.75 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
width	3.9 mm

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CAT1021, CAT1022,

CAT1023

Supervisory Circuits with

C Serial 2k-bit CMOS

EEPROM, Manual Reset and

Watchdog Timer

Description

http://onsemi.com

The CAT1021, CAT1022 and CAT1023 are complete memory and

supervisory solutions for microcontroller−based systems. A 2k−bit

serial EEPROM memory and a system power supervisor with

PDIP−8

TSSOP−8

brown−out protection are integrated together in low power CMOS

CASE 646AA

CASE 948S

C bus.

technology. Memory interface is via a 400 kHz I

The CAT1021 and CAT1023 provide a precision V

sense circuit

and two open drain outputs: one (RESET) drives high and the other

(RESET) drives low whenever V

falls below the reset threshold

voltage. The CAT1022 has only a RESET output and does not have a

SOIC−8

Write Protect input. The CAT1021 also has a Write Protect input

CASE 751BD

(WP). Write operations are disabled if WP is connected to a logic high.

All supervisors have a 1.6 second watchdog timer circuit that resets

a system to a known state if software or a hardware glitch halts or

“hangs” the system. For the CAT1021 and CAT1022, the watchdog

timer monitors the SDA signal. The CAT1023 has a separate watchdog

timer interrupt input pin, WDI.

MSOP−8

TDFN−8

CASE 846AD

CASE 511AL

The power supply monitor and reset circuit protect memory and

system controllers during power up/down and against brownout

conditions. Five reset threshold voltages support 5 V, 3.3 V and 3 V

ORDERING INFORMATION

systems. If power supply voltages are out of tolerance reset signals

become active, preventing the system microcontroller, ASIC or

For Ordering Information details, see page 13.

peripherals from operating. Reset signals become inactive typically

200 ms after the supply voltage exceeds the reset threshold level. With

both active high and low reset signals, interface to microcontrollers

and other ICs is simple. In addition, the RESET pin or a separate input,

MR, can be used as an input for push−button manual reset capability.

The on−chip, 2k−bit EEPROM memory features a 16−byte page. In addition, hardware data protection is provided by a V

sense circuit that prevents writes to memory whenever V

falls below the reset threshold or until V

reaches the reset

threshold during power up.

Available packages include an 8−pin PDIP and surface mount 8−pin SO, 8−pin TSSOP, 8−pin TDFN and 8−pin MSOP

packages. The TDFN package thickness is 0.8 mm maximum. TDFN footprint options are 3 x 3 mm.

Features

♦

•

Precision Power Supply Voltage Monitor

•

5 V, 3.3 V and 3 V Systems

♦

Five Threshold Voltage Options

Watchdog Timer

Active High or Low Reset

♦

Valid Reset Guaranteed at V

= 1 V

400 kHz I

C Bus

2.7 V to 5.5 V Operation

Low Power CMOS Technology

16−Byte Page Write Buffer

•

Built−in Inadvertent Write Protection

•

♦

WP Pin (CAT1021)

1,000,000 Program/Erase Cycles

Manual Reset Input

100 Year Data Retention

Industrial and Extended Temperature Ranges

8−pin DIP, SOIC, TSSOP, MSOP or TDFN (3 x 3 mm

Foot−print) Packages

♦

TDFN Max Height is 0.8 mm

These Devices are Pb−Free, Halogen Free/BFR Free

and are RoHS Compliant

Publication Order Number:

CAT1021/D

Semiconductor Components Industries, LLC, 2011

November, 2011

−

Rev. 18

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