531AB576M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 531AB576M000DGR

531AB576M000DGR: DescriptionLVPECL Output Clock Oscillator, 576MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531AB576M000DGR Overview

LVPECL Output Clock Oscillator, 576MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531AB576M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	576 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Haier KFR-25GW air conditioner control circuit schematic diagram

Practical circuit of switching power supply for dot matrix printer using M51978P-FP chip

Multiple TCM680 parallel connection to reduce Rout circuit diagram

Oscillator circuit that can be switched by external signals

Basic single supply voltage regulator

Driving control circuit diagram operated by eight-speed button

STM32 MLX90164 driver, has anyone tried it before? Please help me: I transplanted the 51 code to STM32, but I can't read the data. Has anyone done it?...; qochen2012 stm32/stm8

【Texas Instruments Video】PCM186x_High-performance audio ADC for all types of terminals Series Video 1: [i=s]This post was last edited by Texas Instruments_Video on 2015-6-18 11:35[/i] [media=x,500,375]http://v.youku.com/v_show/id_XMTI2MzA4Mzk5Ng==.html?firsttime=119&from=y1.4-2[/media] [color=#000000][...; 德州仪器_视频 Analogue and Mixed Signal

Dynamic display of two-digit digital tube: Dear masters, I am learning about the dynamic display of digital tubes recently. I use two-digit digital tubes. First, I want to make a simple stopwatch from 0 to 99 seconds, but the scanning is too f...; 真菌拉拖鞋 MCU

I can't download the Quartus 2 program. I need help urgently.: I have set up everything according to the engineering steps and generated the POF file. But the program cannot be downloaded. I am very anxious. When burning, it always prompts some ID error, which is...; gz475514589 FPGA/CPLD

TMS570LS04x key routine: The keystroke routine of TMS570LS04x can be said to be a very interesting thing. You can try its keystroke routine. TMS570LS04x_BUZZER.rar...; Sur Microcontroller MCU

【Low Power】Research on FPGA power consumption concept and low power design: Abstract: With the rapid development of semiconductor technology and the increase in chip operating frequency, the power consumption of chips has increased rapidly, and the increase in power consumpti...; jjkwz FPGA/CPLD

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components